[PATCH v4 09/10] dt-bindings: arm: Add support for TPDM CMB MSR register
From: Tao Zhang <hidden>
Date: 2024-01-19 03:24:28
Also in:
linux-arm-msm, linux-devicetree, lkml
Subsystem:
arm/coresight framework and drivers, arm/qualcomm mailing list, open firmware and flattened device tree bindings, the rest · Maintainers:
Suzuki K Poulose, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Add property "qcom,cmb_msr_num" to support CMB MSR(mux select register) for TPDM. It specifies the number of CMB MSR registers supported by the TDPM. Signed-off-by: Tao Zhang <redacted> Signed-off-by: Mao Jinlong <redacted> --- .../devicetree/bindings/arm/qcom,coresight-tpdm.yaml | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
index 507a5f887097..75190318b253 100644
--- a/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml
+++ b/Documentation/devicetree/bindings/arm/qcom,coresight-tpdm.yaml@@ -70,6 +70,15 @@ properties: minimum: 0 maximum: 32 + qcom,cmb-msrs-num: + description: + Specifies the number of CMB MSR(mux select register) registers supported + by the monitor. If this property is not configured or set to 0, it means + this TPDM doesn't support CMB MSR. + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 32 + clocks: maxItems: 1
@@ -124,6 +133,7 @@ examples: reg = <0x06c29000 0x1000>; qcom,cmb-element-size = /bits/ 8 <64>; + qcom,cmb-msrs-num = <32>; clocks = <&aoss_qmp>; clock-names = "apb_pclk";
--
2.17.1
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