Re: [PATCH v4 6/9] riscv: dts: starfive: visionfive-v1: Setup ethernet phy
From: Andrew Lunn <andrew@lunn.ch>
Date: 2023-12-19 08:58:49
Also in:
linux-clk, linux-devicetree, linux-riscv, lkml, netdev
On Mon, Dec 18, 2023 at 11:44:46PM +0200, Cristian Ciocaltea wrote:
The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires manual adjustment of the RX internal delay to work properly. The default RX delay provided by the driver is 1.95 ns, which proves to be too high. Applying a 50% reduction seems to mitigate the issue. Also note this adjustment is not necessary on BeagleV Starlight SBC, which uses a Microchip PHY. Hence, there is no indication of a misbehaviour on the GMAC side, but most likely the issue stems from the Motorcomm PHY. While at it, drop the redundant gpio include, which is already provided by jh7100-common.dtsi. Co-developed-by: Emil Renner Berthing <redacted> Signed-off-by: Emil Renner Berthing <redacted> Signed-off-by: Cristian Ciocaltea <redacted>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Andrew
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