Re: [PATCH v3 6/9] riscv: dts: starfive: visionfive-v1: Setup ethernet phy
From: Andrew Lunn <andrew@lunn.ch>
Date: 2023-12-17 17:55:39
Also in:
linux-clk, linux-devicetree, linux-riscv, lkml, netdev
On Fri, Dec 15, 2023 at 10:40:45PM +0200, Cristian Ciocaltea wrote:
The StarFive VisionFive V1 SBC uses a Motorcomm YT8521 PHY supporting RGMII-ID, but requires manual adjustment of the RX internal delay to work properly. The default RX delay provided by the driver is 1.95 ns, which proves to be too high. Applying a 50% reduction seems to mitigate the issue. Also note this adjustment is not necessary on BeagleV Starlight SBC, which uses a Microchip PHY. Hence, there is no indication of a miss-behaviour on the GMAC side, but most likely the issue stems from the Motorcomm PHY.
I suggest you make a similar comment in the .dts file, just to explain the odd setting. Andrew _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel