Re: [PATCH v5 1/3] arm64: perf: Include threshold control fields in PMEVTYPER mask
From: Anshuman Khandual <hidden>
Date: 2023-11-22 08:45:02
Also in:
linux-doc, linux-perf-users, lkml
On 11/13/23 16:55, James Clark wrote:
FEAT_PMUv3_TH (Armv8.8) adds two new fields to PMEVTYPER, so include them in the mask. These aren't writable on 32 bit kernels as they are in the high part of the register, so only include them for arm64. It would be difficult to do this statically in the asm header files for each platform without resulting in circular includes or #ifdefs inline in the code. For that reason the ARMV8_PMU_EVTYPE_MASK definition has been removed and the mask is constructed programmatically.
Agreed, and this also makes sense because there is just a single instance for ARMV8_PMU_EVTYPE_MASK in armv8pmu_write_evtype().
quoted hunk ↗ jump to hunk
Signed-off-by: James Clark <redacted> --- drivers/perf/arm_pmuv3.c | 9 ++++++++- include/linux/perf/arm_pmuv3.h | 3 ++- 2 files changed, 10 insertions(+), 2 deletions(-)diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c index 6ca7be05229c..1d40d794f5e4 100644 --- a/drivers/perf/arm_pmuv3.c +++ b/drivers/perf/arm_pmuv3.c@@ -555,8 +555,15 @@ static void armv8pmu_write_counter(struct perf_event *event, u64 value) static inline void armv8pmu_write_evtype(int idx, u32 val) { u32 counter = ARMV8_IDX_TO_COUNTER(idx); + unsigned long mask = ARMV8_PMU_EVTYPE_EVENT | + ARMV8_PMU_INCLUDE_EL2 | + ARMV8_PMU_EXCLUDE_EL0 | + ARMV8_PMU_EXCLUDE_EL1;
At first this looks bit odd sequence - EL2, EL0, EL1 but such as these bit positions. #define ARMV8_PMU_EXCLUDE_EL1 (1U << 31) #define ARMV8_PMU_EXCLUDE_EL0 (1U << 30) #define ARMV8_PMU_INCLUDE_EL2 (1U << 27)
- val &= ARMV8_PMU_EVTYPE_MASK; + if (IS_ENABLED(CONFIG_ARM64)) + mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH;
This makes sense.
quoted hunk ↗ jump to hunk
+ + val &= mask; write_pmevtypern(counter, val); }diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h index 9c226adf938a..ddd1fec86739 100644 --- a/include/linux/perf/arm_pmuv3.h +++ b/include/linux/perf/arm_pmuv3.h@@ -228,7 +228,8 @@ /* * PMXEVTYPER: Event selection reg */ -#define ARMV8_PMU_EVTYPE_MASK 0xc800ffff /* Mask for writable bits */ +#define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) +#define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61)
Looks correct.
#define ARMV8_PMU_EVTYPE_EVENT 0xffff /* Mask for EVENT bits */ /*
Reviewed-by: Anshuman Khandual <redacted> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel