On 10/31/2023 12:27 AM, Stephen Boyd wrote:

Quoting Kathiravan Thirumoorthy (2023-10-30 02:47:19)

quoted

Add support for gpll0_out_aux clock which acts as the parent for
certain networking subsystem (NSS) clocks.

Signed-off-by: Kathiravan Thirumoorthy <redacted>
---
  drivers/clk/qcom/gcc-ipq5332.c | 14 ++++++++++++++
  1 file changed, 14 insertions(+)

diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c
index 235849876a9a..966bb7ca8854 100644
--- a/drivers/clk/qcom/gcc-ipq5332.c
+++ b/drivers/clk/qcom/gcc-ipq5332.c

@@ -87,6 +87,19 @@ static struct clk_alpha_pll_postdiv gpll0 = {
         },
  };
  
+static struct clk_alpha_pll_postdiv gpll0_out_aux = {
+       .offset = 0x20000,
+       .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS],
+       .width = 4,
+       .clkr.hw.init = &(struct clk_init_data) {

const initdata

Thanks for pointing it out. Some of the clock structure doesn't have the 
"const" qualifier. Will fix all those in V2.

quoted

+               .name = "gpll0_out_aux",
+               .parent_hws = (const struct clk_hw *[]) {
+                               &gpll0_main.clkr.hw },
+               .num_parents = 1,
+               .ops = &clk_alpha_pll_postdiv_ro_ops,
+       },
+};
+
  static struct clk_alpha_pll gpll2_main = {
         .offset = 0x21000,
         .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS],

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