RE: [PATCH RESEND 2/2] drivers: clk: zynqmp: update divider round rate logic
From: Buddhabhatti, Jay <hidden>
Date: 2023-10-25 12:22:01
Also in:
linux-clk, lkml
Hi Stephen,
-----Original Message----- From: Stephen Boyd <sboyd@kernel.org> Sent: Tuesday, October 24, 2023 9:08 AM To: Buddhabhatti, Jay <redacted>; Simek, Michal [off-list ref]; mturquette@baylibre.com Cc: linux-clk@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- kernel@vger.kernel.org; Buddhabhatti, Jay [off-list ref] Subject: Re: [PATCH RESEND 2/2] drivers: clk: zynqmp: update divider round rate logic Quoting Jay Buddhabhatti (2023-10-16 04:30:02)quoted
Currently zynqmp divider round rate is considering single parent and calculating rate and parent rate accordingly. But if divider clock flag is set to SET_RATE_PARENT then its not trying to traverse through all parent rate and not selecting best parent rate from that. So use common divider_round_rate() which is traversing through all clock parents and its rate and calculating proper parent rate. Signed-off-by: Jay Buddhabhatti <redacted> --- drivers/clk/zynqmp/divider.c | 70 ++++++------------------------------ 1 file changed, 10 insertions(+), 60 deletions(-)Can't argue against removing that many lines!quoted
diff --git a/drivers/clk/zynqmp/divider.cb/drivers/clk/zynqmp/divider.c index 33a3b2a22659..a42c183d7e5d 100644--- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c@@ -193,23 +149,17 @@ static long zynqmp_clk_divider_round_rate(structclk_hw *hw,quoted
return DIV_ROUND_UP_ULL((u64)*prate, bestdiv); } - bestdiv = zynqmp_divider_get_val(*prate, rate, divider->flags); - - /* - * In case of two divisors, compute best divider values and return - * divider2 value based on compute value. div1 will be automatically - * set to optimum based on required total divider value. - */ - if (div_type == TYPE_DIV2 && - (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) { - zynqmp_get_divider2_val(hw, rate, divider, &bestdiv); + max = divider->max_div; + while (max != 0) { + if ((max & 1) == 1) + width++; + max = max >> 1;Is this ffs()?
[Jay] We need last set bit to get max width. I will use fls() to get most significant set bit for this. Thanks for suggestion. Thanks, Jay
quoted
} - if ((clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT) && divider->is_frac) - bestdiv = rate % *prate ? 1 : bestdiv; + rate = divider_round_rate(hw, rate, prate, NULL, width, + divider->flags); - bestdiv = min_t(u32, bestdiv, divider->max_div); - *prate = rate * bestdiv; + if (divider->is_frac && (clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)&& (rate % *prate))quoted
+ *prate = rate;
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