Re: [PATCH] clk: mediatek: mt8186: Change I2C 4/5/6 ap clocks parent to infra

On Tue, 2023-10-24 at 10:58 +0800, Chen-Yu Tsai wrote:

On Tue, Oct 24, 2023 at 10:52 AM Stephen Boyd [off-list ref]
wrote:

quoted

Quoting Chen-Yu Tsai (2023-10-19 22:06:35)

quoted

On Thu, Oct 19, 2023 at 8:49 PM AngeloGioacchino Del Regno
[off-list ref] wrote:

quoted

Fix the parenting of clocks imp_iic_wrap_ap_clock_i2c{4-6}, as
those
are effectively parented to infra_ao_i2c{4-6} and not to the
I2C_AP.
This permits the correct (and full) enablement and disablement
of the
I2C4, I2C5 and I2C6 bus clocks, satisfying the whole clock tree
of
those.

As an example, when requesting to enable
imp_iic_wrap_ap_clock_i2c4:

Before: infra_ao_i2c_ap -> imp_iic_wrap_ap_clock_i2c4
After:  infra_ao_i2c_ap -> infra_ao_i2c4 ->
imp_iic_wrap_ap_clock_i2c4

Fixes: 66cd0b4b0ce5 ("clk: mediatek: Add MT8186 imp i2c wrapper
clock support")
Signed-off-by: AngeloGioacchino Del Regno <
angelogioacchino.delregno@collabora.com>

I'm curious about what led to discovering this error?

Is that an acked-by?

MediaTek engineers are saying the original code already matches the
documentation provided by their hardware engineers. I'm trying to get
them to respond on the mailing list.

ChenYu

After checking with I2C clock hardware designer there is no
infra_ao_i2c{4-6} clock gate in between. And the clock document at hand
aslo shows the same result. Generallly speaking, we would like to keep
sw setting align with the hardware design document. I would recommand
not to change this part of code, but enable infra_ao_i2c{4-6} prior to
the usage of imp_iic_wrap_ap_clock_i2c clock.

Best Regards,
YuChang
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