On Thu, Oct 12, 2023 at 03:24:12PM +0200, Krzysztof Kozlowski wrote:

On 12/10/2023 13:01, Sebastian Fricke wrote:

quoted

From: Robert Beckett <redacted>

Add bindings for the chips&media wave5 codec driver

Signed-off-by: Robert Beckett <redacted>
Signed-off-by: Dafna Hirschfeld <redacted>
Signed-off-by: Sebastian Fricke <redacted>
---
 .../devicetree/bindings/media/cnm,wave5.yaml       | 60 ++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/Documentation/devicetree/bindings/media/cnm,wave5.yaml b/Documentation/devicetree/bindings/media/cnm,wave5.yaml
new file mode 100644
index 000000000000..b31d34aec05b
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/cnm,wave5.yaml

@@ -0,0 +1,60 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/cnm,wave5.yaml#

Filename matching compatible, so: cnm,cm521c-vpu.yaml

quoted

+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Chips&Media Wave 5 Series multi-standard codec IP
+
+maintainers:
+  - Nas Chung [off-list ref]
+  - Jackson Lee [off-list ref]
+
+description:
+  The Chips&Media WAVE codec IP is a multi format video encoder/decoder
+
+properties:
+  compatible:
+    enum:
+      - cnm,cm521c-vpu

Can this device be anything else? Why VPU suffix?

It needs an SoC specific compatible (TI something...) as well (or 
instead). Unless there's a public spec with details on how many 
clocks, resets, interrupts, etc. there are.

Rob

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