在 9/20/2023 6:03 PM, Konrad Dybcio 写道:

On 9/20/23 08:54, Tengfei Fan wrote:

quoted

Add base description of UART and TLMM nodes which helps SM4450
boot to shell with console on boards with this SoC.

Signed-off-by: Tengfei Fan <redacted>
---

The SoC change must be separate from the board change.

[...]

Please leave a comment explaining what these GPIOs are
used for.

I checked these gpio setting, the gpio0 ~ gpio3 are for NFC eSE SPI, 
gpio136 is for LPI Debug.

quoted

+&tlmm {
+    gpio-reserved-ranges = <0 4>, <136 1>;
+};

[...]

quoted

+        qupv3_id_0: geniqup@ac0000 {
+            compatible = "qcom,geni-se-qup";
+            reg = <0x0 0x00ac0000 0x0 0x2000>;
+            ranges;
+            clock-names = "m-ahb", "s-ahb";
+            clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>,
+                 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>;

property
property-names

I will adjust these nodes.

[...]

quoted

+
+            uart7: serial@a88000 {
+                compatible = "qcom,geni-debug-uart";
+                reg = <0 0x00a88000 0 0x4000>;

Use 0x0 consistently.

I will update this for using "0x0" instead of "0".

quoted

+                clock-names = "se";
+                clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;

property
property-names

I will adjust these nodes.

quoted

+                interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
+                pinctrl-names = "default";
+                pinctrl-0 = <&qup_uart7_tx>, <&qup_uart7_rx>;

ditto

I will adjust these nodes.

[...]

quoted

+            compatible = "qcom,sm4450-tlmm";
+            reg = <0 0x0f100000 0 0x300000>;

Use 0x0 consistently

I will update this for using "0x0" instead of "0"

quoted

+            interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
+            gpio-controller;
+            #gpio-cells = <2>;
+            interrupt-controller;
+            #interrupt-cells = <2>;
+            gpio-ranges = <&tlmm 0 0 137>;
+            wakeup-parent = <&pdc>;
+
+            qup_uart7_rx: qup-uart7-rx-state {
+                pins = "gpio23";
+                function = "qup1_se2_l2";
+                drive-strength = <2>;
+                bias-disable;
+            };
+
+            qup_uart7_tx: qup-uart7-tx-state {
+                pins = "gpio22";
+                function = "qup1_se2_l2";
+                drive-strength = <2>;
+                bias-disable;
+            };
+        };
+
          intc: interrupt-controller@17200000 {
              compatible = "arm,gic-v3";
              reg = <0x0 0x17200000 0x0 0x10000>,     /* GICD */

@@ -476,7 +525,6 @@

                  clocks = <&xo_board>;
              };
          };
-

Totally unrelated change, fix the patch introducing it instead.

Konrad

Hi Konrad,
I will remove this rnrelated change.

-- 
Thx and BRs,
Tengfei Fan

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