From: Jacky Bai <ping.bai@nxp.com>

On i.MX8ULP, the ARM PLL can run at 960MHz, so need to
update the mult table to make sure the ARM PLL can
get a correct PLL frequency as we expected.

Reviewed-by: Ye Li <redacted>
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/clk/imx/clk-pllv4.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/clk/imx/clk-pllv4.c b/drivers/clk/imx/clk-pllv4.c
index 9b136c951762..7ea26e15f245 100644
--- a/drivers/clk/imx/clk-pllv4.c
+++ b/drivers/clk/imx/clk-pllv4.c

@@ -48,7 +48,7 @@ struct clk_pllv4 {
 };
 
 /* Valid PLL MULT Table */
-static const int pllv4_mult_table[] = {33, 27, 22, 20, 17, 16};
+static const int pllv4_mult_table[] = {40, 33, 27, 22, 20, 17, 16};
 
 /* Valid PLL MULT range, (max, min) */
 static const int pllv4_mult_range[] = {54, 27};

-- 
2.37.1


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