Thread (22 messages) 22 messages, 6 authors, 2023-08-29

Re: [PATCH v11 1/6] irqchip/gic-v3: Enable support for SGIs to act as NMIs

From: Doug Anderson <dianders@chromium.org>
Date: 2023-08-28 15:36:27
Also in: linux-perf-users, lkml

Hi,

On Sat, Aug 26, 2023 at 3:37 AM Marc Zyngier [off-list ref] wrote:
On Thu, 24 Aug 2023 16:30:27 +0100,
Douglas Anderson [off-list ref] wrote:
quoted
As of commit 6abbd6988971 ("irqchip/gic, gic-v3: Make SGIs use
handle_percpu_devid_irq()") SGIs are treated the same as PPIs/EPPIs
and use handle_percpu_devid_irq() by default. Unfortunately,
handle_percpu_devid_irq() isn't NMI safe, and so to run in an NMI
context those should use handle_percpu_devid_fasteoi_nmi().

In order to accomplish this, we just have to make room for SGIs in the
array of refcounts that keeps track of which interrupts are set as
NMI. We also rename the array and create a new indexing scheme that
accounts for SGIs.

Also, enable NMI support prior to gic_smp_init() as allocation of SGIs
as IRQs/NMIs happen as part of this routine.

Co-developed-by: Sumit Garg <redacted>
Signed-off-by: Sumit Garg <redacted>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
---
In v10 I removed the previous Reviewed-by and Tested-by tags since the
patch contents changed pretty drastically.

I'll also note that this change is a little more black magic to me
than others in this series. I don't have a massive amounts of
familiarity with all the moving parts of gic-v3, so I mostly just
followed Mark Rutland's advice [1]. Please pay extra attention to make
sure I didn't do anything too terrible.

Mark's advice wasn't a full patch and I ended up doing a bit of work
to translate it to reality, so I did not add him as "Co-developed-by"
here. Mark: if you would like this tag then please provide it and your
Signed-off-by. I certainly won't object.

[1] https://lore.kernel.org/r/ZNC-YRQopO0PaIIo@FVFF77S0Q05N.cambridge.arm.com (local)

(no changes since v10)

Changes in v10:
- Rewrite as needed for 5.11+ as per Mark Rutland and Sumit.

 drivers/irqchip/irq-gic-v3.c | 54 ++++++++++++++++++++++++------------
 1 file changed, 36 insertions(+), 18 deletions(-)
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index eedfa8e9f077..49d18cf3f636 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -78,6 +78,8 @@ static DEFINE_STATIC_KEY_TRUE(supports_deactivate_key);
 #define GIC_LINE_NR  min(GICD_TYPER_SPIS(gic_data.rdists.gicd_typer), 1020U)
 #define GIC_ESPI_NR  GICD_TYPER_ESPIS(gic_data.rdists.gicd_typer)

+#define SGI_NR               16
Why 16? We only allocate 8, as the other 8 are potentially stolen by
the secure side. We do try and initialise them all so that they have a
known state if they were actually configured as Group-1NS, but we
don't use them.

I understand that this simplifies the indexing in the rdist_nmi_refs
array and I'm not going to cry over 32 wasted bytes, but this
definitely deserves a comment.
Good point. I'll plan to wait another day or two to see if any other
feedback shows up and then send a v12 with this plus Stephen's nit
fixes on one of the other patches.

-Doug

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