-----Original Message-----
From: Adrian Hunter <adrian.hunter@intel.com>
Sent: 2023年8月15日 20:08
To: Giulio Benetti <giulio.benetti@benettiengineering.com>; Bough Chen
[off-list ref]; Ulf Hansson [off-list ref]; Shawn Guo
[off-list ref]; Sascha Hauer [off-list ref]; Fabio
Estevam [off-list ref]; dl-linux-imx [off-list ref]
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>;
linux-mmc@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
linux-kernel@vger.kernel.org; Jim Reinhart [off-list ref]; James Autry
[off-list ref]; Matthew Maron [off-list ref]
Subject: Re: [PATCH] mmc: sdhci-esdhc-imx: improve ESDHC_FLAG_ERR010450

On 12/08/23 00:48, Giulio Benetti wrote:

quoted

Errata ERR010450 only shows up if voltage is 1.8V, but if the device
is supplied by 3v3 the errata can be ignored. So let's check for if
quirk SDHCI_QUIRK2_NO_1_8_V is defined or not before limiting the

frequency.

quoted

Sponsored by: Tekvox Inc.
Cc: Jim Reinhart <redacted>
Cc: James Autry <redacted>
Cc: Matthew Maron <redacted>
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>

Haibo Chen, can we get an Acked-by from you?

Sorry for the delay, I just forget this mail.

I just double check the Errata doc, yes, the limitation is only for 1.8v I/O timing.
So
Acked-by: Haibo Chen <haibo.chen@nxp.com>

Thanks
Best Regards
Haibo Chen.

quoted

---
 drivers/mmc/host/sdhci-esdhc-imx.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c

b/drivers/mmc/host/sdhci-esdhc-imx.c
index eebf94604a7f..cddecc1e1ac2 100644

--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ b/drivers/mmc/host/sdhci-esdhc-imx.c

@@ -171,8 +171,8 @@
 #define ESDHC_FLAG_HS400		BIT(9)
 /*
  * The IP has errata ERR010450
- * uSDHC: Due to the I/O timing limit, for SDR mode, SD card clock

can't
- * exceed 150MHz, for DDR mode, SD card clock can't exceed 45MHz.
+ * uSDHC: At 1.8V due to the I/O timing limit, for SDR mode, SD card
+ * clock can't exceed 150MHz, for DDR mode, SD card clock can't exceed

45MHz.

quoted

  */
 #define ESDHC_FLAG_ERR010450		BIT(10)
 /* The IP supports HS400ES mode */

@@ -961,7 +961,8 @@ static inline void esdhc_pltfm_set_clock(struct

sdhci_host *host,

quoted

 		| ESDHC_CLOCK_MASK);
 	sdhci_writel(host, temp, ESDHC_SYSTEM_CONTROL);

-	if (imx_data->socdata->flags & ESDHC_FLAG_ERR010450) {
+	if ((imx_data->socdata->flags & ESDHC_FLAG_ERR010450) &&
+	    (!(host->quirks2 & SDHCI_QUIRK2_NO_1_8_V))) {
 		unsigned int max_clock;

 		max_clock = imx_data->is_ddr ? 45000000 : 150000000;

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