Re: [PATCH 16/27] KVM: arm64: nv: Add trap forwarding for HCR_EL2

On Thu, 13 Jul 2023 16:53:40 +0100,
Marc Zyngier [off-list ref] wrote:

quoted

Hey Eric,

Thanks for looking into this, much appreciated given how tedious it
is.

FWIW, here are the changes I'm going to squash in that patch. Shout if
you spot something that looks odd...

Thanks,

	M.

diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c
index c4057f4ff72d..f5978b463aca 100644
--- a/arch/arm64/kvm/emulate-nested.c
+++ b/arch/arm64/kvm/emulate-nested.c

@@ -55,7 +55,8 @@ enum coarse_grain_trap_id {
 	CGT_HCR_TERR,
 	CGT_HCR_APK,
 	CGT_HCR_NV,
-	CGT_HCR_NV1,
+	CGT_HCR_NV_nNV2,
+	CGT_HCR_NV1_nNV2,
 	CGT_HCR_AT,
 	CGT_HCR_FIEN,
 	CGT_HCR_TID4,

@@ -89,7 +90,7 @@ enum coarse_grain_trap_id {
 	CGT_HCR_TVM_TRVM,
 	CGT_HCR_TPU_TICAB,
 	CGT_HCR_TPU_TOCU,
-	CGT_HCR_NV1_ENSCXT,
+	CGT_HCR_NV1_nNV2_ENSCXT,
 	CGT_MDCR_TPM_TPMCR,
 	CGT_MDCR_TDE_TDA,
 	CGT_MDCR_TDE_TDOSA,

@@ -154,7 +155,7 @@ static const struct trap_bits coarse_trap_bits[] = {
 		.mask		= HCR_TSW,
 		.behaviour	= BEHAVE_FORWARD_ANY,
 	},
-	[CGT_HCR_TPC] = {
+	[CGT_HCR_TPC] = { /* Also called TCPC when FEAT_DPB is implemented */
 		.index		= HCR_EL2,
 		.value		= HCR_TPC,
 		.mask		= HCR_TPC,

@@ -176,7 +177,7 @@ static const struct trap_bits coarse_trap_bits[] = {
 		.index		= HCR_EL2,
 		.value		= HCR_TVM,
 		.mask		= HCR_TVM,
-		.behaviour	= BEHAVE_FORWARD_ANY,
+		.behaviour	= BEHAVE_FORWARD_WRITE,
 	},
 	[CGT_HCR_TDZ] = {
 		.index		= HCR_EL2,

@@ -209,12 +210,18 @@ static const struct trap_bits coarse_trap_bits[] = {
 		.behaviour	= BEHAVE_FORWARD_ANY,
 	},
 	[CGT_HCR_NV] = {
+		.index		= HCR_EL2,
+		.value		= HCR_NV,
+		.mask		= HCR_NV,
+		.behaviour	= BEHAVE_FORWARD_ANY,
+	},
+	[CGT_HCR_NV_nNV2] = {
 		.index		= HCR_EL2,
 		.value		= HCR_NV,
 		.mask		= HCR_NV | HCR_NV2,
 		.behaviour	= BEHAVE_FORWARD_ANY,
 	},
-	[CGT_HCR_NV1] = {
+	[CGT_HCR_NV1_nNV2] = {
 		.index		= HCR_EL2,
 		.value		= HCR_NV | HCR_NV1,
 		.mask		= HCR_NV | HCR_NV1 | HCR_NV2,

@@ -350,7 +357,7 @@ static const enum coarse_grain_trap_id *coarse_control_combo[] = {
 	MCB(CGT_HCR_TVM_TRVM,		CGT_HCR_TVM, CGT_HCR_TRVM),
 	MCB(CGT_HCR_TPU_TICAB,		CGT_HCR_TPU, CGT_HCR_TICAB),
 	MCB(CGT_HCR_TPU_TOCU,		CGT_HCR_TPU, CGT_HCR_TOCU),
-	MCB(CGT_HCR_NV1_ENSCXT,		CGT_HCR_NV1, CGT_HCR_ENSCXT),
+	MCB(CGT_HCR_NV1_nNV2_ENSCXT,	CGT_HCR_NV1_nNV2, CGT_HCR_ENSCXT),
 	MCB(CGT_MDCR_TPM_TPMCR,		CGT_MDCR_TPM, CGT_MDCR_TPMCR),
 	MCB(CGT_MDCR_TDE_TDA,		CGT_MDCR_TDE, CGT_MDCR_TDA),
 	MCB(CGT_MDCR_TDE_TDOSA,		CGT_MDCR_TDE, CGT_MDCR_TDOSA),

@@ -501,6 +508,7 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initdata = {
 	SR_TRAP(SYS_DC_CIVAC,		CGT_HCR_TPC),
 	SR_TRAP(SYS_DC_CVAC,		CGT_HCR_TPC),
 	SR_TRAP(SYS_DC_CVAP,		CGT_HCR_TPC),
+	SR_TRAP(SYS_DC_CVADP,		CGT_HCR_TPC),
 	SR_TRAP(SYS_DC_IVAC,		CGT_HCR_TPC),
 	SR_TRAP(SYS_DC_CIGVAC,		CGT_HCR_TPC),
 	SR_TRAP(SYS_DC_CIGDVAC,		CGT_HCR_TPC),

@@ -625,7 +633,6 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initdata = {
 		      sys_reg(3, 5, 10, 15, 7), CGT_HCR_NV),
 	SR_RANGE_TRAP(sys_reg(3, 5, 12, 0, 0),
 		      sys_reg(3, 5, 14, 15, 7), CGT_HCR_NV),
-	SR_TRAP(SYS_SP_EL1,		CGT_HCR_NV),
 	SR_TRAP(OP_AT_S1E2R,		CGT_HCR_NV),
 	SR_TRAP(OP_AT_S1E2W,		CGT_HCR_NV),
 	SR_TRAP(OP_AT_S12E1R,		CGT_HCR_NV),

@@ -698,10 +705,14 @@ static const struct encoding_to_trap_config encoding_to_cgt[] __initdata = {
 	SR_TRAP(OP_TLBI_RIPAS2LE1OSNXS,	CGT_HCR_NV),
 	SR_TRAP(OP_TLBI_RVAE2OSNXS,	CGT_HCR_NV),
 	SR_TRAP(OP_TLBI_RVALE2OSNXS,	CGT_HCR_NV),
-	SR_TRAP(SYS_VBAR_EL1,		CGT_HCR_NV1),
-	SR_TRAP(SYS_ELR_EL1,		CGT_HCR_NV1),
-	SR_TRAP(SYS_SPSR_EL1,		CGT_HCR_NV1),
-	SR_TRAP(SYS_SCXTNUM_EL1,	CGT_HCR_NV1_ENSCXT),
+	SR_TRAP(OP_CPP_RCTX, 		CGT_HCR_NV),
+	SR_TRAP(OP_DVP_RCTX, 		CGT_HCR_NV),
+	SR_TRAP(OP_CFP_RCTX, 		CGT_HCR_NV),
+	SR_TRAP(SYS_SP_EL1,		CGT_HCR_NV_nNV2),
+	SR_TRAP(SYS_VBAR_EL1,		CGT_HCR_NV1_nNV2),
+	SR_TRAP(SYS_ELR_EL1,		CGT_HCR_NV1_nNV2),
+	SR_TRAP(SYS_SPSR_EL1,		CGT_HCR_NV1_nNV2),
+	SR_TRAP(SYS_SCXTNUM_EL1,	CGT_HCR_NV1_nNV2_ENSCXT),
 	SR_TRAP(SYS_SCXTNUM_EL0,	CGT_HCR_ENSCXT),
 	SR_TRAP(OP_AT_S1E1R, 		CGT_HCR_AT),
 	SR_TRAP(OP_AT_S1E1W, 		CGT_HCR_AT),