Thread (41 messages) 41 messages, 2 authors, 2023-05-16

Re: [PATCH 04/23] arm64: zynqmp: Fix usb reset over bootmode pins on zcu100

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From: Michal Simek <monstr@monstr.eu>
Date: 2023-05-16 11:08:02
Also in: linux-devicetree, lkml


On 5/2/23 15:35, Michal Simek wrote:
quoted hunk ↗ jump to hunk
The commit 53ba1b2bdaf7 ("arm64: dts: zynqmp: Add mode-pin GPIO controller
DT node") added usb phy reset over bootmode pins by default on usb0 only.
zcu100 is using usb0 as peripheral and usb1 as host. Unfortunately reset
line is shared for both usb ulpi phys but usb_rst_b is connected to usb5744
hub which is used only in host mode. Especially this chip requires reset to
operate properly that's why better assign gpio reset to usb1 instead of
usb0.

Signed-off-by: Michal Simek <michal.simek@amd.com>
---

  arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts | 2 ++
  1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
index 2dd552cf51fb..c99abb99efcb 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-zcu100-revC.dts
@@ -552,6 +552,7 @@ &usb0 {
  	pinctrl-0 = <&pinctrl_usb0_default>;
  	phy-names = "usb3-phy";
  	phys = <&psgtr 2 PHY_TYPE_USB3 0 0>;
+	/delete-property/ reset-gpios;
  };
  
  &dwc3_0 {
@@ -567,6 +568,7 @@ &usb1 {
  	pinctrl-0 = <&pinctrl_usb1_default>;
  	phy-names = "usb3-phy";
  	phys = <&psgtr 3 PHY_TYPE_USB3 1 0>;
+	reset-gpios = <&modepin_gpio 1 GPIO_ACTIVE_LOW>;
  };
  
  &dwc3_1 {
Applied.
M

-- 
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Xilinx Microblaze
Maintainer of Linux kernel - Xilinx Zynq ARM and ZynqMP/Versal ARM64 SoCs
U-Boot custodian - Xilinx Microblaze/Zynq/ZynqMP/Versal/Versal NET SoCs
TF-A maintainer - Xilinx ZynqMP/Versal/Versal NET SoCs

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