On Thu, Feb 16, 2023 at 09:26:15AM +0200, Leon Romanovsky wrote:

On Wed, Feb 15, 2023 at 02:57:26PM -0600, Bjorn Helgaas wrote:

quoted

[+cc Will, Robin, Joerg for arm-smmu-v3 page size question]

On Sun, Feb 12, 2023 at 08:14:48PM +0200, Leon Romanovsky wrote:

quoted

On Wed, Feb 08, 2023 at 10:43:21AM -0800, Ganapatrao Kulkarni wrote:

quoted

As per PCIe specification(section 10.5), If a VF implements an
ATS capability, its associated PF must implement an ATS capability.
The ATS Capabilities in VFs and their associated PFs are permitted to
be enabled independently.
Also, it states that the Smallest Translation Unit (STU) for VFs must be
hardwired to Zero and the associated PF's value applies to VFs STU.

The current code allows to enable ATS on VFs only if it is already
enabled on associated PF, which is not necessary as per the specification.

It is only required to have valid STU programmed on PF to enable
ATS on VFs. Adding code to write the first VFs STU to a PF's STU
when PFs ATS is not enabled.

Can you please add here quotes from the spec and its version? I don't see
anything like this in my version of PCIe specification.

See PCIe r6.0, sec 10.5.1.

Awesome, I have old versions.

OK, where should I read about this sentence?

"It is only required to have valid STU programmed on PF to enable
 ATS on VFs. Adding code to write the first VFs STU to a PF's STU
 when PFs ATS is not enabled."

From spec:
"Smallest Translation Unit (STU) - This value indicates to the Function the minimum number of
4096-byte blocks that is indicated in a Translation Completions or Invalidate Requests. This is a power of
2 multiplier and the number of blocks is 2STU. A value of 0 0000b indicates one block and a value of
1 1111b indicates 231 blocks (or 8 TB total)

For VFs, this field must be hardwired to Zero. The associated PF's value applies.
Default value is 0 0000b"

And enable bit doesn't have any sentence about STU.

Thanks

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