On Wed, 2023-02-15 at 13:33 +0100, AngeloGioacchino Del Regno wrote:

Il 15/02/23 07:25, Yong Wu ha scritto:

quoted

Add iova_region_larb_msk for mt8192. We separate the 16GB iova
regions
by each device's larbid/portid.
Note: larb3/6/8/10/12/15 connect nothing in this SoC.
Refer to the comment in include/dt-bindings/memory/mt8192-larb-
port.h

Define a new macro MT8192_MULTI_REGION_NR_MAX to indicate
the index of mt8xxx_larb_region_msk and
"struct mtk_iommu_iova_region mt8192_multi_dom"
are the same.

Signed-off-by: Yong Wu <yong.wu@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <
angelogioacchino.delregno@collabora.com>

P.S.: I'm sorry for the step-by-step review and making you send
multiple versions,
       I feel this can be tedious sometimes but - at times - this is
the only way
       to make sure that the code is as "beautiful" and bug-free as
possible!

You are too kind. This should be all we need to thank you for always
help us with a careful review, every clear and careful reply benefit us
a lot.
Many thanks.

Cheers!

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