On Mon, 2023-01-30 at 15:39 -0600, Rob Herring wrote:

On Mon, Jan 30, 2023 at 04:39:05PM +0800, Liu Ying wrote:

quoted

On Sun, 2023-01-29 at 12:46 +0100, Krzysztof Kozlowski wrote:

quoted

On 28/01/2023 04:47, Liu Ying wrote:

quoted

NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register
which
configures parallel display format by using the
"PARALLEL_DISP_FORMAT"
field. Add device tree bindings for the display format
configuration.

Signed-off-by: Liu Ying <victor.liu@nxp.com>
---
 .../display/bridge/nxp,imx93-pdfc.yaml        | 78
+++++++++++++++++++
 1 file changed, 78 insertions(+)
 create mode 100644
Documentation/devicetree/bindings/display/bridge/nxp,imx93-
pdfc.yaml

diff --git
a/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
pdfc.yaml
b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
pdfc.yaml
new file mode 100644
index 000000000000..a84bfb46b01d

--- /dev/null
+++

b/Documentation/devicetree/bindings/display/bridge/nxp,imx93-
pdfc.yaml

@@ -0,0 +1,78 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: 

https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fschemas%2Fdisplay%2Fbridge%2Fnxp%2Cimx93-pdfc.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C3e8db7ce3170451bc0e208db030a6ad0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638107115502467822%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=c%2BQ%2Bhpov6L9b905ozKPrkWiTzaRD3ZFsEh0urw5evsQ%3D&reserved=0

quoted

quoted

quoted

+$schema: 

https://eur01.safelinks.protection.outlook.com/?url=http%3A%2F%2Fdevicetree.org%2Fmeta-schemas%2Fcore.yaml%23&data=05%7C01%7Cvictor.liu%40nxp.com%7C3e8db7ce3170451bc0e208db030a6ad0%7C686ea1d3bc2b4c6fa92cd99c5c301635%7C0%7C0%7C638107115502467822%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjAwMDAiLCJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&sdata=SkPZLJIR9uoqk4mRqSsfu963S%2Baa7xXmyCqzR36LJ30%3D&reserved=0

quoted

quoted

quoted

+
+title: NXP i.MX93 Parallel Display Format Configuration
+
+maintainers:
+  - Liu Ying [off-list ref]
+
+description: |
+  The i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX
register
which
+  configures parallel display format by using the
"PARALLEL_DISP_FORMAT"
+  field.
+
+properties:
+  compatible:
+    const: nxp,imx93-pdfc

Based on description, I have doubts this is a separate bridge
device.
Why this is not part of display driver/bindings?

The relevant display controller in i.MX93 SoC is LCDIF. From
hardware
design PoV, the parallel display format configuration logic is not
a
part of LCDIF. Instead, it's a part of i.MX93 mediamix blk-ctrl.
The
blk-ctrl includes controls for miscellaneous devices with small
logics,
like this parallel display format configuration, LVDS Display
Bridge(LDB, see fsl,ldb.yaml) and so on. The below pipeline
describes
data flow of a parallel display LCD panel:

DRAM -> LCDIF -> parallel display format configuration -> LCD panel

So, the parallel display format configuration appears to be a
separate
bridge.

quoted

We do not create usually devices for single registers, because
they
are
not a devices. Devices are a bit more complex - have some pin
inputs/outputs, not a register only. Of course there are
exception,
but
this one does not look like one.

IMHO, this one is a standalone device although it is controlled by
one
single register. It's input pins connect to LCDIF and output pins
connect to i.MX93 SoC's pins/pads.

Fair enough. It needs to be defined as part of the mediamix blkctrl 
schema though.

Do you mean that we can keep this schema and need to allow child
devices in fsl,imx93-media-blk-ctrl.yaml?

Cc'ing Peng.

Peng, it appears that you are listed in the maintainers of fsl,imx93-
media-blk-ctrl.yaml. I think it needs to be extended to allow child
devices. Do you consider to do that?

Regards,
Liu Ying

Rob

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