Re: [PATCH 2/6] clk: qcom: ipq9574: Enable APSS clock driver
From: Konrad Dybcio <hidden>
Date: 2023-01-13 15:20:03
Also in:
linux-arm-msm, linux-clk, linux-devicetree, lkml
On 13.01.2023 15:36, devi priya wrote:
Enable APSS clock driver for IPQ9574 based devices
Please be more descriptive of what you're doing and why you're doing it. clk: qcom: apss-ipq-pll: Add IPQ9574 support Add IPQ9574-specific APSS PLL configuration values. mailbox: qcom-apcs-ipc: Add IPQ9574 support Add a compatible for IPQ9574's mailbox. The SoC, similarly to other IPQs uses the APSS IPQ PLL driver for CPU scaling.
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Co-developed-by: Praveenkumar I <redacted> Signed-off-by: Praveenkumar I <redacted> Signed-off-by: devi priya <redacted> --- drivers/clk/qcom/apss-ipq-pll.c | 13 +++++++++++++ drivers/mailbox/qcom-apcs-ipc-mailbox.c | 5 +++++ 2 files changed, 18 insertions(+)diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c index a5aea27eb867..dd0c01bf5a98 100644 --- a/drivers/clk/qcom/apss-ipq-pll.c +++ b/drivers/clk/qcom/apss-ipq-pll.c@@ -61,6 +61,18 @@ static const struct alpha_pll_config ipq8074_pll_config = { .test_ctl_hi_val = 0x4000, }; +static const struct alpha_pll_config ipq9574_pll_config = { + .l = 0x3b, + .config_ctl_val = 0x200D4828,
Lowercase hex, please.
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+ .config_ctl_hi_val = 0x6, + .early_output_mask = BIT(3), + .aux2_output_mask = BIT(2), + .aux_output_mask = BIT(1), + .main_output_mask = BIT(0), + .test_ctl_val = 0x0, + .test_ctl_hi_val = 0x4000, +}; + static const struct regmap_config ipq_pll_regmap_config = { .reg_bits = 32, .reg_stride = 4,@@ -102,6 +114,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev) static const struct of_device_id apss_ipq_pll_match_table[] = { { .compatible = "qcom,ipq6018-a53pll", .data = &ipq6018_pll_config }, { .compatible = "qcom,ipq8074-a53pll", .data = &ipq8074_pll_config }, + { .compatible = "qcom,ipq9574-a73pll", .data = &ipq9574_pll_config }, { } };
These are very small changes, so maybe they'll pass, but generally it's preferred to split changes per-file if possible (and here it is possible if you change the APSS PLL driver first and then bind it in APCS mbox afterwards).
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MODULE_DEVICE_TABLE(of, apss_ipq_pll_match_table);diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c b/drivers/mailbox/qcom-apcs-ipc-mailbox.c index 0e9f9cba8668..90e74f9d7cb3 100644 --- a/drivers/mailbox/qcom-apcs-ipc-mailbox.c +++ b/drivers/mailbox/qcom-apcs-ipc-mailbox.c@@ -33,6 +33,10 @@ static const struct qcom_apcs_ipc_data ipq6018_apcs_data = { .offset = 8, .clk_name = "qcom,apss-ipq6018-clk" }; +static const struct qcom_apcs_ipc_data ipq9574_apcs_data = { + .offset = 8, .clk_name = "qcom,apss-ipq6018-clk" +};
Please reuse ipq6018_apcs_data, it's identical. Konrad
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+ static const struct qcom_apcs_ipc_data msm8916_apcs_data = { .offset = 8, .clk_name = "qcom-apcs-msm8916-clk" };@@ -143,6 +147,7 @@ static int qcom_apcs_ipc_remove(struct platform_device *pdev) static const struct of_device_id qcom_apcs_ipc_of_match[] = { { .compatible = "qcom,ipq6018-apcs-apps-global", .data = &ipq6018_apcs_data }, { .compatible = "qcom,ipq8074-apcs-apps-global", .data = &ipq6018_apcs_data }, + { .compatible = "qcom,ipq9574-apcs-apps-global", .data = &ipq9574_apcs_data }, { .compatible = "qcom,msm8916-apcs-kpss-global", .data = &msm8916_apcs_data }, { .compatible = "qcom,msm8939-apcs-kpss-global", .data = &msm8916_apcs_data }, { .compatible = "qcom,msm8953-apcs-kpss-global", .data = &msm8994_apcs_data },
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