On Thu, Nov 10, 2022 at 08:51:43AM +0000, Jan Petrous wrote:

Hi Andrew,

quoted

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Here I just focus on GMAC since there are other LAN interfaces that S32
family
uses [e.g. PFE]. According to the public GMACSUBSYS ref manual rev2[1]
provided
on NXP website, theoretically GMAC can run SGMII in 1000Mbps and
2500Mbps so I
assume that supporting 1000BASE-X could be achievable. I'm not sure if

any

quoted

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S32
board variant might have SFP ports but RJ-45 [1000BASE-T] should be the
major
type used on S32G-EVB and S32G-RDB2.

@NXP, please feel free to correct me if anything wrong.

NXP eval boards (EVB or RDB) have also 2.5G PHYs, so together with SerDes
driver we support 100M/1G/2.5G on such copper PHYs.

Hi Jan

Does the SERDES clock need to change when going between 1000BaseX and
2500BaseX?

If so, it sounds like Linux not having control of that clock is going
to limit what can be supported.

No, the SerDes clock remains the same, the change is done internally, without
any necessity of clock change intervention by GMAC driver.

Hi Jan

Thanks for the information. So this binding should work.

The only suggestion i have is that the binding does not call is SGMII
clock, because it is used for more than SGMII, also 1000base-X, and
2500Base-X. So PCS clock might be better.

	Andrew	    

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