Re: [PATCH 2/2] pinctrl: add NXP S32 SoC family support

Hi Chester,

thanks for your patch!

On Mon, Oct 31, 2022 at 11:10 AM Chester Lin [off-list ref] wrote:

Add the pinctrl driver for NXP S32 SoC family. This driver is mainly based
on NXP's downstream implementation on CodeAurora[1].

[1] https://source.codeaurora.org/external/autobsps32/linux/tree/drivers/pinctrl/freescale?h=bsp34.0-5.10.120-rt

Signed-off-by: Matthew Nunez <redacted>
Signed-off-by: Phu Luu An <redacted>
Signed-off-by: Stefan-Gabriel Mirea <redacted>
Signed-off-by: Larisa Grigore <redacted>
Signed-off-by: Ghennadi Procopciuc <redacted>
Signed-off-by: Andrei Stefanescu <redacted>
Signed-off-by: Radu Pirea <redacted>
Signed-off-by: Chester Lin <redacted>

Overall this looks very good, special thanks for using as much generic code
as possible.

Only main thing I want you to look into are those magic nxp,pins ranges encoded
into the device tree.

+static struct s32_pinctrl_soc_info s32_pinctrl_info = {
+       .pins = s32_pinctrl_pads_siul2,
+       .npins = ARRAY_SIZE(s32_pinctrl_pads_siul2),
+};
+
+static const struct of_device_id s32_pinctrl_of_match[] = {
+       {
+
+               .compatible = "nxp,s32g-siul2-pinctrl",
+               .data = (void *) &s32_pinctrl_info,
+       },
+       { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, s32_pinctrl_of_match);

Since you are already using .data so nicely for the variants surely the
nxp,pins info can go in there too?

Yours,
Linus Walleij

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