On Fri, Oct 14, 2022 at 11:59:38AM +0100, Sudeep Holla wrote:

Hi Besar,

On Wed, Sep 28, 2022 at 07:28:34PM -0500, Besar Wicaksono wrote:

quoted

ARM Performance Monitoring Unit Table describes the properties of PMU
support in ARM-based system. The APMT table contains a list of nodes,
each represents a PMU in the system that conforms to ARM CoreSight PMU
architecture. The properties of each node include information required
to access the PMU (e.g. MMIO base address, interrupt number) and also
identification. For more detailed information, please refer to the
specification below:
 * APMT: https://developer.arm.com/documentation/den0117/latest
 * ARM Coresight PMU:
        https://developer.arm.com/documentation/ihi0091/latest

The initial support adds the detection of APMT table and generic
infrastructure to create platform devices for ARM CoreSight PMUs.
Similar to IORT the root pointer of APMT is preserved during runtime
and each PMU platform device is given a pointer to the corresponding
APMT node.

This looks good to me know.

Reviewed-by: Sudeep Holla <redacted>

Hi Lorenzo,

Not sure if there are any other arm specific ACPI changes in the queue
for v6.2. Can you please add this too ?

Hi Catalin, Will,

would you mind picking this patch up for v6.2 please ?

Thank you very much.

Lorenzo

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