[PATCH v2 19/19] clk: mediatek: Add MT8188 adsp clock support
From: Garmin.Chang <hidden>
Date: 2022-10-24 10:36:19
Also in:
linux-mediatek
Subsystem:
common clk framework, the rest · Maintainers:
Michael Turquette, Stephen Boyd, Linus Torvalds
Add MT8188 adsp clock controller which provides clock gate control for Audio DSP. Signed-off-by: Garmin.Chang <redacted> --- drivers/clk/mediatek/Makefile | 2 +- .../clk/mediatek/clk-mt8188-adsp_audio26m.c | 49 +++++++++++++++++++ 2 files changed, 50 insertions(+), 1 deletion(-) create mode 100644 drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index ff6e7271bc6c..13958c1ab536 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile@@ -88,7 +88,7 @@ obj-$(CONFIG_COMMON_CLK_MT8188) += clk-mt8188-apmixedsys.o clk-mt8188-topckgen.o clk-mt8188-ipe.o clk-mt8188-mfg.o clk-mt8188-vdec.o \ clk-mt8188-vdo0.o clk-mt8188-vdo1.o clk-mt8188-venc.o \ clk-mt8188-vpp0.o clk-mt8188-vpp1.o clk-mt8188-wpe.o \ - clk-mt8188-imp_iic_wrap.o + clk-mt8188-imp_iic_wrap.o clk-mt8188-adsp_audio26m.o obj-$(CONFIG_COMMON_CLK_MT8192) += clk-mt8192.o obj-$(CONFIG_COMMON_CLK_MT8192_AUDSYS) += clk-mt8192-aud.o obj-$(CONFIG_COMMON_CLK_MT8192_CAMSYS) += clk-mt8192-cam.o
diff --git a/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c b/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c
new file mode 100644
index 000000000000..64e4f9ffe771
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt8188-adsp_audio26m.c@@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0-only +// +// Copyright (c) 2022 MediaTek Inc. +// Author: Garmin Chang <garmin.chang@mediatek.com> + +#include <linux/clk-provider.h> +#include <linux/platform_device.h> +#include <dt-bindings/clock/mediatek,mt8188-clk.h> + +#include "clk-gate.h" +#include "clk-mtk.h" + +static const struct mtk_gate_regs adsp_audio26m_cg_regs = { + .set_ofs = 0x80, + .clr_ofs = 0x80, + .sta_ofs = 0x80, +}; + +#define GATE_ADSP_FLAGS(_id, _name, _parent, _shift) \ + GATE_MTK_FLAGS(_id, _name, _parent, &adsp_audio26m_cg_regs, _shift, \ + &mtk_clk_gate_ops_no_setclr, CLK_IGNORE_UNUSED) + +static const struct mtk_gate adsp_audio26m_clks[] = { + GATE_ADSP_FLAGS(CLK_AUDIODSP_AUDIO26M, "audiodsp_audio26m", "clk26m", 3), +}; + +static const struct mtk_clk_desc adsp_audio26m_desc = { + .clks = adsp_audio26m_clks, + .num_clks = ARRAY_SIZE(adsp_audio26m_clks), +}; + +static const struct of_device_id of_match_clk_mt8188_adsp_audio26m[] = { + { + .compatible = "mediatek,mt8188-adsp_audio26m", + .data = &adsp_audio26m_desc, + }, { + /* sentinel */ + } +}; + +static struct platform_driver clk_mt8188_adsp_audio26m_drv = { + .probe = mtk_clk_simple_probe, + .remove = mtk_clk_simple_remove, + .driver = { + .name = "clk-mt8188-adsp_audio26m", + .of_match_table = of_match_clk_mt8188_adsp_audio26m, + }, +}; +builtin_platform_driver(clk_mt8188_adsp_audio26m_drv);
--
2.18.0
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