On Tue 06 Sep 2022 at 20:29, Heiner Kallweit [off-list ref] wrote:

On 06.09.2022 17:21, Jerome Brunet wrote:

quoted

On Tue 30 Aug 2022 at 14:33, Yu Tu [off-list ref] wrote:

quoted

On 2022/8/29 17:54, Jerome Brunet wrote:

quoted

[ EXTERNAL EMAIL ]
On Sun 14 Aug 2022 at 23:25, Heiner Kallweit [off-list ref]
wrote:

quoted

On a S905X4-based system this call fails randomly.
The vendor driver has a retry mechanism and on my system
the second attempt is successful always.

Heiner, ideally commit message should not be about 'your' system
but describe what the system actually is. This would be more useful down
the road.

Based on Yu Tu feedback I'd propose

'
The PCIe PLL locking may be unreliable under some circumstance, such as
high or low temperature. If the PLL fails to lock, reset it a try again.

This helps on the S905X4
'

If this is OK with you, I can amend the message before applying the
patch, or you may resubmit. As you wish.

Yes, please amend the commit message as suggested.
Thanks for the review and follow-up.

Applied, Thx

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