On Mon, 4 Jul 2022 16:57:32 +0100, James Morse wrote:

Cortex-A510 is affected by an erratum where in rare circumstances the
CPUs may not handle a race between a break-before-make sequence on one
CPU, and another CPU accessing the same page. This could allow a store
to a page that has been unmapped.

Work around this by adding the affected CPUs to the list that needs
TLB sequences to be done twice.

[...]

Applied to arm64 (for-next/errata), thanks!

[1/1] arm64: errata: Add Cortex-A510 to the repeat tlbi list
      https://git.kernel.org/arm64/c/39fdb65f52e9

Cheers,
-- 
Will

https://fixes.arm64.dev
https://next.arm64.dev
https://will.arm64.dev

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