Re: [PATCH v2 0/6] pinctrl: sunxi: Allwinner D1 support
From: Linus Walleij <hidden>
Date: 2022-07-18 09:40:39
Also in:
linux-devicetree, linux-gpio, linux-sunxi, lkml
On Wed, Jul 13, 2022 at 4:52 AM Samuel Holland [off-list ref] wrote:
In the interest of keeping the series ready for v5.20, I decided to drop the D1s bits so we can decide how to handle the compatibles next cycle. This series adds pinctrl support for the Allwinner D1 SoC. First, it updates the I/O bias code to support the new mode found on the D1 (as well as some existing SoCs). Then it refactors the driver to support the new register layout found on the D1. Finally, it adds the new driver. The code size impact of the dynamic register layout ends up being just over 100 bytes: text data bss dec hex filename 11293 564 0 11857 2e51 pinctrl-sunxi.o (patch 3) 11405 564 0 11969 2ec1 pinctrl-sunxi.o (patch 6) This series was tested on A64, H6, and D1. Changes in v2: - Drop D1s compatible for now, due to ongoing discussion - Fix PE3 function "csi0" -> "ncsi0" - Fix comments for JTAG DI/DO pins - Include channel numbers in PWM functions - Drop the separate D1s variant, since D1s is a non-conflicting subset - Enable the driver for MACH_SUN8I to cover T113 (same die, but ARMv7)
Took out v1 and applied this v2 instead! Thanks! Linus Walleij _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel