Thread (11 messages) 11 messages, 6 authors, 2022-07-08

Re: [PATCH v1 4/4] PCI: brcmstb: Augment driver for MIPs SOCs

flat view

From: Bjorn Helgaas <helgaas@kernel.org>
Date: 2022-07-06 21:42:16
Also in: linux-mips, linux-pci, lkml

On Thu, Dec 09, 2021 at 03:47:25PM -0500, Jim Quinlan wrote:
The current brcmstb driver works for Arm and Arm64.  A few things are
modified here for us to support MIPs as well.

  o There are four outbound range register groups and each directs a window
    of up to 128MB.  Even though there are four 128MB DT "ranges" in the
    bmips PCIe DT node, these ranges are contiguous and are collapsed into
    a single range by the OF range parser.  Now the driver assumes a single
    range -- for MIPs only -- and splits it back into 128MB sizes.

  o For bcm7425, the config space accesses must be 32-bit reads or
    writes.  In addition, the 4k config space register array is missing
    and not used.

  o The registers for the upper 32-bits of the outbound window address do
    not exist.

  o Burst size must be set to 256 (this refers to an internal bus).
...
quoted hunk ↗ jump to hunk
@@ -118,6 +118,7 @@
 #define PCIE_MISC_HARD_PCIE_HARD_DEBUG					0x4204
 #define  PCIE_MISC_HARD_PCIE_HARD_DEBUG_CLKREQ_DEBUG_ENABLE_MASK	0x2
 #define  PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK		0x08000000
+#define  PCIE_BMIPS_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK		0x00800000
quoted hunk ↗ jump to hunk
@@ -883,7 +937,10 @@ static int brcm_pcie_setup(struct brcm_pcie *pcie)
 	pcie->bridge_sw_init_set(pcie, 0);
 
 	tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
-	tmp &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK;
+	if (is_bmips(pcie))
+		tmp &= ~PCIE_BMIPS_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK;
+	else
+		tmp &= ~PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK;
 	writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
 	/* Wait for SerDes to be stable */
 	usleep_range(100, 200);
brcm_pcie_resume() has similar code that updates
PCIE_MISC_HARD_PCIE_HARD_DEBUG [1]:

  tmp = readl(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);
  u32p_replace_bits(&tmp, 0, PCIE_MISC_HARD_PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
  writel(tmp, base + PCIE_MISC_HARD_PCIE_HARD_DEBUG);

  /* wait for serdes to be stable */
  udelay(100);

This patch didn't change brcm_pcie_resume() to check is_bmips().
Should it?

If so, it would be nice to use the same method for updating the value
(either u32p_replace_bits or plain C bitops) in both places.

[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/pcie-brcmstb.c?id=v5.18#n1452

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