Re: [PATCH v2 2/3] fpga: region: Add fpga-region 'power-domains' property
From: Xu Yilun <yilun.xu@intel.com>
Date: 2022-06-24 16:36:34
Also in:
linux-devicetree, linux-fpga, lkml
On Mon, May 23, 2022 at 07:15:16PM +0530, Nava kishore Manne wrote:
quoted hunk ↗ jump to hunk
Add fpga-region 'power-domains' property to allow to handle the FPGA/PL power domains. Signed-off-by: Nava kishore Manne <redacted> Acked-by: Rob Herring <robh@kernel.org> --- Changes for v2: - Updated power-domains description. .../devicetree/bindings/fpga/fpga-region.txt | 14 ++++++++++++++ 1 file changed, 14 insertions(+)diff --git a/Documentation/devicetree/bindings/fpga/fpga-region.txt b/Documentation/devicetree/bindings/fpga/fpga-region.txt index 7d3515264838..f299c3749505 100644 --- a/Documentation/devicetree/bindings/fpga/fpga-region.txt +++ b/Documentation/devicetree/bindings/fpga/fpga-region.txt@@ -196,6 +196,20 @@ Optional properties: - config-complete-timeout-us : The maximum time in microseconds time for the FPGA to go to operating mode after the region has been programmed. - child nodes : devices in the FPGA after programming. +- power-domains : A phandle and power domain specifier pair to the power domain + which is responsible for turning on/off the power to the FPGA/PL region.
Could you help explain what is PL?
+Example:
+ fpga_full: fpga-full {
+ compatible = "fpga-region";
+ fpga-mgr = <&zynqmp_pcap>;
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+ power-domains = <&zynqmp_firmware PL_PD>;
+ };
+
+ The PL_PD power domain will be turned on before loading the bitstream
+and turned off while removing/unloading the bitstream using overlays.I think the single power-domain may not cover some use cases that of-fpga-region driver supports. It is possible there are already devices in fpga-region for static OF tree, or an overlay with no 'firmware-name' but 'external-fpga-config'. In these cases power domains may still be needed, is it? Another case is the fpga-region may need multiple power domains? Since the of-fpga-region driver is a generic fpga-region driver, we may investigate more for a compatible power-domain solution. Thanks, Yilun
In the example below, when an overlay is applied targeting fpga-region0, fpga_mgr is used to program the FPGA. Two bridges are controlled during -- 2.25.1
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