Re: [PATCH v9 2/3] iommu/mediatek: Rename MTK_IOMMU_TLB_ADDR to MTK_IOMMU_ADDR

On Wed, 2022-06-15 at 18:14 +0100, Robin Murphy wrote:

On 2022-06-15 17:12, yf.wang--- via iommu wrote:

quoted

From: Yunfei Wang <redacted>

Rename MTK_IOMMU_TLB_ADDR to MTK_IOMMU_ADDR, and update
MTK_IOMMU_ADDR
definition for better generality.

Signed-off-by: Ning Li <redacted>
Signed-off-by: Yunfei Wang <redacted>
---
  drivers/iommu/mtk_iommu.c | 8 ++++----
  1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index bb9dd92c9898..3d62399e8865 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c

@@ -265,8 +265,8 @@ static const struct iommu_ops mtk_iommu_ops;
  
  static int mtk_iommu_hw_init(const struct mtk_iommu_data *data,

unsigned int bankid);
  
-#define MTK_IOMMU_TLB_ADDR(iova) ({				
	\
-	dma_addr_t _addr = iova;					\
+#define MTK_IOMMU_ADDR(addr) ({					
	\
+	unsigned long long _addr = addr;				\

If phys_addr_t is 64-bit, then dma_addr_t is also 64-bit, so there is
no 
loss of generality from using an appropriate type - IOVAs have to
fit 
into dma_addr_t for iommu-dma, after all. However, since IOVAs also
have 
to fit into unsigned long in the general IOMMU API, as "addr" is
here, 
then this is still just as broken for 32-bit LPAE as the existing
code is.

Thanks,
Robin.

Hi Robin,
According to Path#1's suggestion, next version will keep ttbr to encoded 32 bits,
then will don't need to modify it.

Thanks,
Yunfei.

quoted

  	((lower_32_bits(_addr) & GENMASK(31, 12)) |
upper_32_bits(_addr));\
  })
  

@@ -381,8 +381,8 @@ static void

mtk_iommu_tlb_flush_range_sync(unsigned long iova, size_t size,
  		writel_relaxed(F_INVLD_EN1 | F_INVLD_EN0,
  			       base + data->plat_data->inv_sel_reg);
  
-		writel_relaxed(MTK_IOMMU_TLB_ADDR(iova), base +
REG_MMU_INVLD_START_A);
-		writel_relaxed(MTK_IOMMU_TLB_ADDR(iova + size - 1),
+		writel_relaxed(MTK_IOMMU_ADDR(iova), base +
REG_MMU_INVLD_START_A);
+		writel_relaxed(MTK_IOMMU_ADDR(iova + size - 1),
  			       base + REG_MMU_INVLD_END_A);
  		writel_relaxed(F_MMU_INV_RANGE, base +
REG_MMU_INVALIDATE);

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