Re: [RESEND v8 07/19] clk: mediatek: reset: Support nonsequence base offsets of reset registers
From: Stephen Boyd <sboyd@kernel.org>
Date: 2022-06-16 01:52:08
Also in:
linux-clk, linux-devicetree, linux-mediatek, lkml
Quoting Rex-BC Chen (2022-05-23 02:33:34)
The bank offsets are not serial for all reset registers. For example, there are five infra reset banks for MT8192: 0x120, 0x130, 0x140, 0x150 and 0x730. To support this, - Change reg_ofs to rst_bank_ofs which is a pointer to base offsets of the reset register. - Add a new define RST_NR_PER_BANK to define reset number for each reset bank. Signed-off-by: Rex-BC Chen <redacted> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Nícolas F. R. A. Prado <redacted> Tested-by: Nícolas F. R. A. Prado <redacted> ---
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