Gentle ping. Any comment or suggestion is appreciated.

Thank you,
Besar

-----Original Message-----
From: Besar Wicaksono <redacted>
Sent: Wednesday, May 25, 2022 1:49 PM
To: suzuki.poulose@arm.com; robin.murphy@arm.com;
catalin.marinas@arm.com; will@kernel.org; mark.rutland@arm.com
Cc: linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org;
linux-tegra@vger.kernel.org; sudeep.holla@arm.com;
thanu.rangarajan@arm.com; Michael.Williams@arm.com; Thierry Reding
[off-list ref]; Jonathan Hunter [off-list ref]; Vikram
Sethi [off-list ref]; Besar Wicaksono [off-list ref]
Subject: [PATCH v3 0/2] perf: ARM CoreSight PMU support

Add driver support for ARM CoreSight PMU device and event attributes for
NVIDIA
implementation. The code is based on ARM Coresight PMU architecture and
ACPI ARM
Performance Monitoring Unit table (APMT) specification below:
 * ARM Coresight PMU:
        https://developer.arm.com/documentation/ihi0091/latest
 * APMT: https://developer.arm.com/documentation/den0117/latest

Notes:
 * There is a concern on the naming of the PMU device.
   Currently the driver is probing "arm-coresight-pmu" device, however the
APMT
   spec supports different kinds of CoreSight PMU based implementation. So
it is
   open for discussion if the name can stay or a "generic" name is required.
   Please see the following thread:
   http://lists.infradead.org/pipermail/linux-arm-kernel/2022-
May/740485.html

The patchset applies on top of
  https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git
  master next-20220524

Changes from v2:
 * Driver is now probing "arm-system-pmu" device.
 * Change default PMU naming to "arm_<APMT node type>_pmu".
 * Add implementor ops to generate custom name.
Thanks to suzuki.poulose@arm.com for the review comments.

Changes from v1:
 * Remove CPU arch dependency.
 * Remove 32-bit read/write helper function and just use read/writel.
 * Add .is_visible into event attribute to filter out cycle counter event.
 * Update pmiidr matching.
 * Remove read-modify-write on PMCR since the driver only writes to
PMCR.E.
 * Assign default cycle event outside the 32-bit PMEVTYPER range.
 * Rework the active event and used counter tracking.
Thanks to robin.murphy@arm.com for the review comments.

Besar Wicaksono (2):
  perf: coresight_pmu: Add support for ARM CoreSight PMU driver
  perf: coresight_pmu: Add support for NVIDIA SCF and MCF attribute

 arch/arm64/configs/defconfig                  |    1 +
 drivers/perf/Kconfig                          |    2 +
 drivers/perf/Makefile                         |    1 +
 drivers/perf/coresight_pmu/Kconfig            |   11 +
 drivers/perf/coresight_pmu/Makefile           |    7 +
 .../perf/coresight_pmu/arm_coresight_pmu.c    | 1316
+++++++++++++++++
 .../perf/coresight_pmu/arm_coresight_pmu.h    |  177 +++
 .../coresight_pmu/arm_coresight_pmu_nvidia.c  |  312 ++++
 .../coresight_pmu/arm_coresight_pmu_nvidia.h  |   17 +
 9 files changed, 1844 insertions(+)
 create mode 100644 drivers/perf/coresight_pmu/Kconfig
 create mode 100644 drivers/perf/coresight_pmu/Makefile
 create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.c
 create mode 100644 drivers/perf/coresight_pmu/arm_coresight_pmu.h
 create mode 100644
drivers/perf/coresight_pmu/arm_coresight_pmu_nvidia.c
 create mode 100644
drivers/perf/coresight_pmu/arm_coresight_pmu_nvidia.h


base-commit: 09ce5091ff971cdbfd67ad84dc561ea27f10d67a
--
2.17.1

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