RE: [RFC PATCH v2 20/21] x86: Add support for CONFIG_CFI_CLANG
From: David Laight <hidden>
Date: 2022-05-17 08:49:15
Also in:
linux-hardening, lkml, llvm
From: Peter Zijlstra
Sent: 17 May 2022 09:41
...
quoted
If we use %eax instead of %r10d for the hash transfer (as per Joao), and use int3 instead of ud2, then we can shrink the fineibt sequence to: __cfi_\func: endbr # 4 xorl $0x12345678, %eax # 5 jz 1f # 2 int3 # 1 \func: ... Which is 12 bytes, and needs a larger preamble (up from 9 in the current proposal).On all that; perhaps it would be good to have a compiler option to specify the preamble size. It can enforce the minimum at 7 to have at least the required: movl $0x12345678, %eax int3 int3 but any larger number will just increase the preamble with int3 padding at the top. That can go right along with the option to supress endbr when preamble :-)
You also need a compiler option to specify the register. While (I think) %eax is usable in kernel, it isn't in userspace. It is used in varargs calls to pass (IIRC) the number of fp args that are passed in registers. (I can't remember which registers userspace has reserved for the PLT code? - That might include r10??) David - Registered Address Lakeside, Bramley Road, Mount Farm, Milton Keynes, MK1 1PT, UK Registration No: 1397386 (Wales) _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel