Re: [PATCH v4 02/22] arm64: dts: mt8192: Add spmi node

Hi Mathias,

On Wed, 2022-03-23 at 18:16 +0100, Matthias Brugger wrote:

On 18/03/2022 15:45, Allen-KH Cheng wrote:

quoted

Add spmi node for mt8192 SoC.

Signed-off-by: Allen-KH Cheng <redacted>
Reviewed-by: Nícolas F. R. A. Prado <redacted>
Reviewed-by: AngeloGioacchino Del Regno <
angelogioacchino.delregno@collabora.com>
---
  arch/arm64/boot/dts/mediatek/mt8192.dtsi | 17 +++++++++++++++++
  1 file changed, 17 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi

b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 76428599444e..0f9f211ca986 100644

--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi

@@ -535,6 +535,23 @@
  			assigned-clock-parents = <&topckgen

CLK_TOP_OSC_D10>;
  		};
  
+		spmi: spmi@10027000 {
+			compatible = "mediatek,mt6873-spmi";
+			reg = <0 0x10027000 0 0x000e00>,
+			      <0 0x10029000 0 0x000100>;
+			reg-names = "pmif", "spmimst";
+			clocks = <&infracfg CLK_INFRA_PMIC_AP>,
+				 <&infracfg CLK_INFRA_PMIC_TMR>,
+				 <&topckgen CLK_TOP_SPMI_MST_SEL>;
+			clock-names = "pmif_sys_ck",
+				      "pmif_tmr_ck",
+				      "spmimst_clk_mux";
+			assigned-clocks = <&topckgen
CLK_TOP_PWRAP_ULPOSC_SEL>;
+			assigned-clock-parents = <&topckgen
CLK_TOP_OSC_D10>;
+			#address-cells = <2>;
+			#size-cells = <0>;

What do we need the address-cells and size-cells for?

Regards,
Matthias

We wiil add two regulators for board level (mt8192-asurada.dtsi).

Adress-cells and size-cells are used to dentify regulator.

&spmi {
        grpid = <11>;

        mt6315_6: pmic@6 {
               
compatible = "mediatek,mt6315-regulator";
                reg = <0x6 0>;

		....
        };

        mt6315_7: pmic@7 {
               
compatible = "mediatek,mt6315-regulator";
                reg = <0x7 0>;

		....
        };
};

Thanks,
Allen

quoted

+
  		scp_adsp: clock-controller@10720000 {
  			compatible = "mediatek,mt8192-scp_adsp";
  			reg = <0 0x10720000 0 0x1000>;

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