Re: [PATCH] ARM: dts: bcm2837: Add the missing L1/L2 cache information
From: Florian Fainelli <f.fainelli@gmail.com>
Date: 2022-02-01 00:29:15
Also in:
linux-devicetree
On 1/31/2022 4:24 PM, Florian Fainelli wrote:
On Sat, 18 Dec 2021 21:00:09 +0100, Richard Schleich [off-list ref] wrote:quoted
This patch fixes the kernel warning "cacheinfo: Unable to detect cache hierarchy for CPU 0" for the bcm2837 on newer kernel versions. Signed-off-by: Richard Schleich <redacted> ---Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
I did remove the comments that were not helpful for the 'd-cache-size', 'd-cache-line-size', 'i-cache-size' and 'i-cache-line-size' since they are self explanatory. Thanks! -- Florian _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel