Hi Fuad,

On Mon, Jan 24, 2022 at 9:20 AM Fuad Tabba [off-list ref] wrote:

.Hi Reiji,

On Thu, Jan 6, 2022 at 4:29 AM Reiji Watanabe [off-list ref] wrote:

quoted

Add feature_config_ctrl for PMUv3, PMS and TraceFilt, which are
indicated in ID_AA64DFR0_EL1, to program configuration registers
to trap guest's using those features when they are not exposed to
the guest.

Signed-off-by: Reiji Watanabe <redacted>
---
 arch/arm64/kvm/sys_regs.c | 47 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 72e745c5a9c2..229671ec3abd 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c

@@ -349,6 +349,22 @@ static void feature_mte_trap_activate(struct kvm_vcpu *vcpu)
        feature_trap_activate(vcpu, VCPU_HCR_EL2, HCR_TID5, HCR_DCT | HCR_ATA);
 }

+static void feature_pmuv3_trap_activate(struct kvm_vcpu *vcpu)
+{
+       feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TPM, 0);

I think that for full coverage it might be good to include setting
MDCR_EL2_TPMCR, and clearing MDCR_EL2_HPME | MDCR_EL2_MTPME |
MDCR_EL2_HPMN_MASK, even if redundant at this point.

I included what is needed only, and I would prefer not to let KVM
do things that are not needed to trap guest's using the feature.
Please let me know if you have a specific reason why you think it
would be better to include them.

quoted

+}
+
+static void feature_pms_trap_activate(struct kvm_vcpu *vcpu)
+{
+       feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TPMS,
+                             MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT);
+}
+
+static void feature_tracefilt_trap_activate(struct kvm_vcpu *vcpu)
+{
+       feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TTRF, 0);
+}
+
 /* For ID_AA64PFR0_EL1 */
 static struct feature_config_ctrl ftr_ctrl_ras = {
        .ftr_reg = SYS_ID_AA64PFR0_EL1,

@@ -375,6 +391,31 @@ static struct feature_config_ctrl ftr_ctrl_mte = {
        .trap_activate = feature_mte_trap_activate,
 };

+/* For ID_AA64DFR0_EL1 */
+static struct feature_config_ctrl ftr_ctrl_pmuv3 = {
+       .ftr_reg = SYS_ID_AA64DFR0_EL1,
+       .ftr_shift = ID_AA64DFR0_PMUVER_SHIFT,
+       .ftr_min = ID_AA64DFR0_PMUVER_8_0,
+       .ftr_signed = FTR_UNSIGNED,
+       .trap_activate = feature_pmuv3_trap_activate,
+};
+
+static struct feature_config_ctrl ftr_ctrl_pms = {
+       .ftr_reg = SYS_ID_AA64DFR0_EL1,
+       .ftr_shift = ID_AA64DFR0_PMSVER_SHIFT,
+       .ftr_min = ID_AA64DFR0_PMSVER_8_2,
+       .ftr_signed = FTR_UNSIGNED,
+       .trap_activate = feature_pms_trap_activate,
+};
+
+static struct feature_config_ctrl ftr_ctrl_tracefilt = {
+       .ftr_reg = SYS_ID_AA64DFR0_EL1,
+       .ftr_shift = ID_AA64DFR0_TRACE_FILT_SHIFT,
+       .ftr_min = 1,
+       .ftr_signed = FTR_UNSIGNED,
+       .trap_activate = feature_tracefilt_trap_activate,
+};

I think you might be missing trace, ID_AA64DFR0_TRACEVER -> CPTR_EL2_TTA.

Thank you for catching this. I will add the trace.

Thanks,
Reiji

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