On Thu, Dec 23, 2021 at 5:59 PM Chen-Yu Tsai [off-list ref] wrote:
On Mon, Dec 20, 2021 at 8:20 PM Tinghan Shen [off-list ref] wrote:
quoted
+ infracfg_rst: reset-controller {
+ compatible = "ti,syscon-reset";
+ #reset-cells = <1>;
+ ti,reset-bits = <
+ 0x140 18 0x144 18 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE)
+ 0x120 0 0x124 0 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE)
+ 0x730 10 0x734 10 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE)
+ 0x150 5 0x154 5 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE)
This should be 7 cells per entry:
ti,reset-bits =
<0x140 18 0x144 18 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE>,
<0x120 0 0x124 0 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE)>,
<...>,
<...>;
Please ignore this comment. It looks like I misread the binding, and your
version is correct. However please format the columns so they align.
ChenYu
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