Dear Rob,
	Thanks for your comment~
On Fri, 2021-12-10 at 12:52 -0600, Rob Herring wrote:

On Fri, Dec 10, 2021 at 09:31:29AM +0800, Biao Huang wrote:

quoted

Add binding document for the ethernet on mt8195.

Signed-off-by: Biao Huang <redacted>
---
 .../bindings/net/mediatek-dwmac.yaml          | 86
+++++++++++++++----
 1 file changed, 70 insertions(+), 16 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/mediatek-

dwmac.yaml b/Documentation/devicetree/bindings/net/mediatek-
dwmac.yaml
index 9207266a6e69..fb04166404d8 100644

--- a/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
+++ b/Documentation/devicetree/bindings/net/mediatek-dwmac.yaml

@@ -19,11 +19,67 @@ select:
       contains:
         enum:
           - mediatek,mt2712-gmac
+          - mediatek,mt8195-gmac
   required:
     - compatible
 
 allOf:
   - $ref: "snps,dwmac.yaml#"
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - mediatek,mt2712-gmac
+
+    then:
+      properties:
+        clocks:
+          minItems: 5
+          items:
+            - description: AXI clock
+            - description: APB clock
+            - description: MAC Main clock
+            - description: PTP clock
+            - description: RMII reference clock provided by MAC
+
+        clock-names:
+          minItems: 5
+          items:
+            - const: axi
+            - const: apb
+            - const: mac_main
+            - const: ptp_ref
+            - const: rmii_internal
+
+  - if:
+      properties:
+        compatible:
+          contains:
+            enum:
+              - mediatek,mt8195-gmac
+
+    then:
+      properties:
+        clocks:
+          minItems: 6
+          items:
+            - description: AXI clock
+            - description: APB clock
+            - description: MAC clock gate

Add new clocks on to the end of existing clocks. That will simplify
the 
binding as here you will just need 'minItems: 6'.

The "rmii_internal" clock is a special one we put it to the end on
purpose, and will turn it on/off in driver according to whether
phy_mode is rmii or not.

So the "mac_cg" clock, which is new for mt8195, and not used in mt2712,
can't put it to the end for simplicity.

Can we just keep it this way? or other suggestions?

[v3 reply]

http://lists.infradead.org/pipermail/linux-mediatek/2021-November/031951.html

quoted

+            - description: MAC Main clock
+            - description: PTP clock
+            - description: RMII reference clock provided by MAC
+
+        clock-names:
+          minItems: 6
+          items:
+            - const: axi
+            - const: apb
+            - const: mac_cg
+            - const: mac_main
+            - const: ptp_ref
+            - const: rmii_internal
 
 properties:
   compatible:

@@ -32,22 +88,10 @@ properties:
           - enum:
               - mediatek,mt2712-gmac
           - const: snps,dwmac-4.20a
-
-  clocks:
-    items:
-      - description: AXI clock
-      - description: APB clock
-      - description: MAC Main clock
-      - description: PTP clock
-      - description: RMII reference clock provided by MAC
-
-  clock-names:
-    items:
-      - const: axi
-      - const: apb
-      - const: mac_main
-      - const: ptp_ref
-      - const: rmii_internal
+      - items:
+          - enum:
+              - mediatek,mt8195-gmac
+          - const: snps,dwmac-5.10a
 
   mediatek,pericfg:
     $ref: /schemas/types.yaml#/definitions/phandle

@@ -62,6 +106,8 @@ properties:
       or will round down. Range 0~31*170.
       For MT2712 RMII/MII interface, Allowed value need to be a

multiple of 550,
       or will round down. Range 0~31*550.
+      For MT8195 RGMII/RMII/MII interface, Allowed value need to
be a multiple of 290,
+      or will round down. Range 0~31*290.
 
   mediatek,rx-delay-ps:
     description:

@@ -70,6 +116,8 @@ properties:
       or will round down. Range 0~31*170.
       For MT2712 RMII/MII interface, Allowed value need to be a

multiple of 550,
       or will round down. Range 0~31*550.
+      For MT8195 RGMII/RMII/MII interface, Allowed value need to
be a multiple
+      of 290, or will round down. Range 0~31*290.
 
   mediatek,rmii-rxc:
     type: boolean

@@ -103,6 +151,12 @@ properties:
       3. the inside clock, which be sent to MAC, will be inversed

in RMII case when
          the reference clock is from MAC.
 
+  mediatek,mac-wol:
+    type: boolean
+    description:
+      If present, indicates that MAC supports WOL(Wake-On-LAN),
and MAC WOL will be enabled.
+      Otherwise, PHY WOL is perferred.
+
 required:
   - compatible
   - reg
-- 
2.25.1

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