Thread (5 messages) 5 messages, 5 authors, 2021-11-24

Re: [PATCH] iommu/rockchip: Fix PAGE_DESC_HI_MASKs for RK3568

From: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Date: 2021-11-24 08:25:51
Also in: linux-iommu, linux-rockchip, lkml

Le 24/11/2021 à 03:13, Alex Bee a écrit :
With the submission of iommu driver for RK3568 a subtle bug was
introduced: PAGE_DESC_HI_MASK1 and PAGE_DESC_HI_MASK2 have to be
the other way arround - that leads to random errors, especially when
addresses beyond 32 bit are used.

Fix it.

Fixes: c55356c534aa ("iommu: rockchip: Add support for iommu v2")
Signed-off-by: Alex Bee <redacted>
Thanks for the fix.

Reviewed-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
quoted hunk ↗ jump to hunk
---

I've found this bug, when testing the recent VOP2 submission, which is
the first perpherial which uses iommu for RK356x. I could use it on my
quartz64 8GB board only, when limiting the available memory to less 4GB.

This patch fixes it.

  drivers/iommu/rockchip-iommu.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 5cb260820eda..7f23ad61c094 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -200,8 +200,8 @@ static inline phys_addr_t rk_dte_pt_address(u32 dte)
  #define DTE_HI_MASK2	GENMASK(7, 4)
  #define DTE_HI_SHIFT1	24 /* shift bit 8 to bit 32 */
  #define DTE_HI_SHIFT2	32 /* shift bit 4 to bit 36 */
-#define PAGE_DESC_HI_MASK1	GENMASK_ULL(39, 36)
-#define PAGE_DESC_HI_MASK2	GENMASK_ULL(35, 32)
+#define PAGE_DESC_HI_MASK1	GENMASK_ULL(35, 32)
+#define PAGE_DESC_HI_MASK2	GENMASK_ULL(39, 36)
  
  static inline phys_addr_t rk_dte_pt_address_v2(u32 dte)
  {
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