On Mon, Nov 22, 2021 at 04:53:41PM +0100, Geert Uytterhoeven wrote:

The isa_mode() macro extracts two fields, and recombines them into a
single value.  The shift value of the J-bit may look off-by-one to the
casual reader, as it is the net result of the extraction and
recombination steps.

I'd recommend avoiding the suggestion that the explicit "- 1" could
be misinterpreted as an off-by-one error.

 #define isa_mode(regs) \
-	((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
-	 (((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
+	((FIELD_GET(PSR_J_BIT, (regs)->ARM_cpsr) << 1) | \

I'd suggest getting rid of the extra unnecessary parens there.
Too many parens leads to a decrease in readability.

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