Re: [PATCH] soc: imx: gpcv2: Synchronously suspend MIX domains
From: Marek Vasut <marex@denx.de>
Date: 2021-10-18 12:13:14
On 10/17/21 9:40 PM, Lucas Stach wrote:
Am Samstag, dem 16.10.2021 um 23:05 +0200 schrieb Marek Vasut:quoted
In case the following power domain sequence happens, iMX8M Mini always hangs: gpumix:on -> gpu:on -> gpu:off -> gpu:on This is likely due to another quirk of the GPC block. This situation can be prevented by always synchronously powering off both the domain and MIX domain. Make it so. This turns the aforementioned sequence into: gpumix:on -> gpu:on -> gpu:off -> gpumix:off -> gpumix:on -> gpu:onDid you test this with the reset sequence fixed? 2b2f106eb552 (Revert "soc: imx: gpcv2: move reset assert after requesting domain power up") in Shawns tree.
It is also in next, so yes.
I don't like that this is slowing down the power-down sequence and I'm not sure if it's required for the other domains, or if this is again a GPU domain specific issue.
That's why I CCed NXP, they might provide clarification.
However, if it's fixing a hang that isn't solved by the proper reset sequence, I would say better safe than sorry, and we can always optimize this later if possible.
I have this feeling we will be optimizing them until we end up keeping them on all the time, because of the constant quirks ... I hope I am wrong about this.
Under the assumption that it's required even with the proper reset sequence: Acked-by: Lucas Stach <l.stach@pengutronix.de>
[...] _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel