[RFC 10/13] arm64: dts: mt8192: Add APU-IOMMU nodes
From: Flora Fu <hidden>
Date: 2021-10-23 11:15:44
Also in:
dri-devel, linux-media, linux-mediatek, lkml
Subsystem:
arm/mediatek soc support, the rest · Maintainers:
Matthias Brugger, AngeloGioacchino Del Regno, Linus Torvalds
From: Yong Wu <yong.wu@mediatek.com> Add APU-IOMMI nodes Signed-off-by: Yong Wu <yong.wu@mediatek.com> Signed-off-by: Flora Fu <redacted> --- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 7014082637b0..d5e417a512a7 100644
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi@@ -8,6 +8,7 @@ #include <dt-bindings/clock/mt8192-clk.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/memory/mt8192-larb-port.h> #include <dt-bindings/pinctrl/mt8192-pinfunc.h> #include <dt-bindings/power/mt8192-power.h>
@@ -916,6 +917,14 @@ #clock-cells = <1>; }; + iommu_apu: m4u@19010000 { + compatible = "mediatek,mt8192-iommu-apu"; + reg = <0 0x19010000 0 0x1000>; + interrupts = <GIC_SPI 394 IRQ_TYPE_LEVEL_HIGH 0>; + power-domains = <&apuspm 0>; + #iommu-cells = <1>; + }; + apu_conn: apu_conn@19020000 { compatible = "mediatek,mt8192-apu-conn", "syscon"; reg = <0 0x19020000 0 0x1000>;
--
2.18.0
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