Thread (37 messages) 37 messages, 3 authors, 2021-10-26

Re: [PATCH v6 06/16] soc: mediatek: add mtk-mmsys support for mt8195 vdosys1

From: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Date: 2021-10-14 14:52:25
Also in: dri-devel, linux-devicetree, linux-mediatek, lkml

quoted hunk ↗ jump to hunk
Add mt8195 vdosys1 clock driver name and routing table to
the driver data of mtk-mmsys.

Signed-off-by: Nancy.Lin <redacted>
---
  drivers/soc/mediatek/mt8195-mmsys.h    | 136 +++++++++++++++++++++++++
  drivers/soc/mediatek/mtk-mmsys.c       |  10 ++
  include/linux/soc/mediatek/mtk-mmsys.h |   2 +
  3 files changed, 148 insertions(+)
diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h
index 0c97a5f016c1..f19ec72c1243 100644
--- a/drivers/soc/mediatek/mt8195-mmsys.h
+++ b/drivers/soc/mediatek/mt8195-mmsys.h
@@ -59,6 +59,70 @@
  #define MT8195_SOUT_DSC_WRAP1_OUT_TO_SINA_VIRTUAL0		(2 << 16)
  #define MT8195_SOUT_DSC_WRAP1_OUT_TO_VPP_MERGE			(3 << 16)
  
+#define MT8195_VDO1_VPP_MERGE0_P0_SEL_IN			0xf04
+#define MT8195_VPP_MERGE0_P0_SEL_IN_FROM_MDP_RDMA0		(1 << 0)
There is no bitshifting action here: this is simply 1.
+
+#define MT8195_VDO1_VPP_MERGE0_P1_SEL_IN			0xf08
+#define MT8195_VPP_MERGE0_P1_SEL_IN_FROM_MDP_RDMA1		(1 << 0)
Same here.
+
+#define MT8195_VDO1_DISP_DPI1_SEL_IN				0xf10
+#define MT8195_DISP_DPI1_SEL_IN_FROM_VPP_MERGE4_MOUT		(0 << 0)
And this is 0.
+
+#define MT8195_VDO1_DISP_DP_INTF0_SEL_IN			0xf14
+#define MT8195_DISP_DP_INTF0_SEL_IN_FROM_VPP_MERGE4_MOUT	(0 << 0)
+
+#define MT8195_VDO1_MERGE4_SOUT_SEL				0xf18
+#define MT8195_MERGE4_SOUT_TO_DPI1_SEL				(2 << 0)
This is simply 0x2...
+#define MT8195_MERGE4_SOUT_TO_DP_INTF0_SEL			(3 << 0)
...and this is 0x3.

There are other occurrences of the same logic, so please fix them all.

Regards,
- Angelo


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