[PATCH v3 2/2] pinctrl: microchip sgpio: use reset driver
From: Horatiu Vultur <horatiu.vultur@microchip.com>
Date: 2021-10-14 08:59:12
Also in:
linux-devicetree, linux-gpio, lkml
Subsystem:
arm/microchip sparx5 soc support, pin control subsystem, the rest · Maintainers:
Steen Hegelund, Daniel Machon, Linus Walleij, Linus Torvalds
On lan966x platform when the switch gets reseted then also the sgpio gets reseted. The fix for this is to extend also the sgpio driver to call the reset driver which will be reseted only once by the first driver that is probed. Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com> --- drivers/pinctrl/pinctrl-microchip-sgpio.c | 6 ++++++ 1 file changed, 6 insertions(+)
diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c
index 072bccdea2a5..e8a91d0824cb 100644
--- a/drivers/pinctrl/pinctrl-microchip-sgpio.c
+++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c@@ -17,6 +17,7 @@ #include <linux/pinctrl/pinmux.h> #include <linux/platform_device.h> #include <linux/property.h> +#include <linux/reset.h> #include "core.h" #include "pinconf.h"
@@ -803,6 +804,7 @@ static int microchip_sgpio_probe(struct platform_device *pdev) int div_clock = 0, ret, port, i, nbanks; struct device *dev = &pdev->dev; struct fwnode_handle *fwnode; + struct reset_control *reset; struct sgpio_priv *priv; struct clk *clk; u32 val;
@@ -813,6 +815,10 @@ static int microchip_sgpio_probe(struct platform_device *pdev) priv->dev = dev; + reset = devm_reset_control_get_shared(&pdev->dev, "switch"); + if (!IS_ERR(reset)) + reset_control_reset(reset); + clk = devm_clk_get(dev, NULL); if (IS_ERR(clk)) return dev_err_probe(dev, PTR_ERR(clk), "Failed to get clock\n");
--
2.33.0
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