On Mon, Oct 04, 2021 at 01:51:27PM -0300, Jason Gunthorpe wrote:

On Mon, Oct 04, 2021 at 09:36:37AM -0700, Florian Fainelli wrote:

quoted

No please don't, I should have arguably justified the reasons why
better, but the main reason is that one of the platforms on which this
driver is used has received extensive power management analysis and
changes, and shutting down every bit of hardware, including something as
small as a SPI controller, and its clock (and its PLL) helped meet
stringent power targets.

Huh? for device shutdown? What would this matter if the next step is
reboot or power off?

On some embedded systems, especially ultra low cost ones, the system
power off state might not actually involve removing all the physical
power supplies for the all the chips in the system so any residual
leakages or active functions will continue to consume power.

Ideally the system power on/off will be triggered by a PMIC which is
able to physically remove power to most other parts of the system which
avoids this issue (much like the PSU in a server) but that's not always
the case.