Hi Chun-Kuang,

Thanks for the review.

On Tue, 2021-09-07 at 07:42 +0800, Chun-Kuang Hu wrote:

Hi, Nancy:

Nancy.Lin [off-list ref] 於 2021年9月6日 週一 下午3:15寫道：

quoted

Add vdosys1 RDMA definition.

Signed-off-by: Nancy.Lin <redacted>
---
 .../display/mediatek/mediatek,mdp-rdma.yaml   | 77
+++++++++++++++++++
 1 file changed, 77 insertions(+)
 create mode 100644
Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
rdma.yaml

diff --git
a/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
rdma.yaml
b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
rdma.yaml
new file mode 100644
index 000000000000..3610093848e1

--- /dev/null
+++

b/Documentation/devicetree/bindings/display/mediatek/mediatek,mdp-
rdma.yaml

I've compared the rdma driver in mdp [1] with the rdma driver in
display [2], both are similar. The difference are like merge0 versus
merge5. So I would like both binding document are placed together. In
display folder? In media folder? In SoC folder? I've no idea which
one
is better, but at lease put together.

[1] 
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20210824100027.25989-6-moudy.ho@mediatek.com/__;!!CTRNKA9wMg0ARbw!1MjfK1sAMDvP9fU1GX6QvfLEfapYEcLmsYP2AhkAOZ6LVaLTLi6vAnJMMqH3vrJ3$
 
[2] 
https://urldefense.com/v3/__https://patchwork.kernel.org/project/linux-mediatek/patch/20210906071539.12953-12-nancy.lin@mediatek.com/__;!!CTRNKA9wMg0ARbw!1MjfK1sAMDvP9fU1GX6QvfLEfapYEcLmsYP2AhkAOZ6LVaLTLi6vAnJMMuM29V9T$
 

Regards,
Chun-Kuang.

OK, I will discuss this with Moudy.

Regards,
Nancy Lin

quoted

@@ -0,0 +1,77 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: 

https://urldefense.com/v3/__http://devicetree.org/schemas/display/mediatek/mediatek,mdp-rdma.yaml*__;Iw!!CTRNKA9wMg0ARbw!1MjfK1sAMDvP9fU1GX6QvfLEfapYEcLmsYP2AhkAOZ6LVaLTLi6vAnJMMheRB2bL$
 
+$schema: 
https://urldefense.com/v3/__http://devicetree.org/meta-schemas/core.yaml*__;Iw!!CTRNKA9wMg0ARbw!1MjfK1sAMDvP9fU1GX6QvfLEfapYEcLmsYP2AhkAOZ6LVaLTLi6vAnJMMkoF4_Zs$
 
+
+title: mediatek display MDP RDMA
+
+maintainers:
+  - CK Hu [off-list ref]
+
+description: |
+  The mediatek display MDP RDMA stands for Read Direct Memory
Access.
+  It provides real time data to the back-end panel driver, such as
DSI,
+  DPI and DP_INTF.
+  It contains one line buffer to store the sufficient pixel data.
+  RDMA device node must be siblings to the central MMSYS_CONFIG
node.
+  For a description of the MMSYS_CONFIG binding, see
+  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.ya
ml for details.
+
+properties:
+  compatible:
+    oneOf:
+      - items:
+          - const: mediatek,mt8195-vdo1-rdma
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  power-domains:
+    description: A phandle and PM domain specifier as defined by
bindings of
+      the power controller specified by phandle. See
+      Documentation/devicetree/bindings/power/power-domain.yaml
for details.
+
+  clocks:
+    items:
+      - description: RDMA Clock
+
+  iommus:
+    description:
+      This property should point to the respective IOMMU block
with master port as argument,
+      see
Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for
details.
+
+  mediatek,gce-client-reg:
+    description:
+      The register of display function block to be set by gce.
There are 4 arguments,
+      such as gce node, subsys id, offset and register size. The
subsys id that is
+      mapping to the register of display function blocks is
defined in the gce header
+      include/include/dt-bindings/gce/<chip>-gce.h of each chips.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+  - power-domains
+  - clocks
+  - iommus
+
+additionalProperties: false
+
+examples:
+  - |
+
+    vdo1_rdma0: vdo1_rdma@1c104000 {
+        compatible = "mediatek,mt8195-vdo1-rdma";
+        reg = <0 0x1c104000 0 0x1000>;
+        interrupts = <GIC_SPI 495 IRQ_TYPE_LEVEL_HIGH 0>;
+        clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>;
+        power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>;
+        iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>;
+        mediatek,gce-client-reg = <&gce1 SUBSYS_1c10XXXX 0x4000
0x1000>;
+    };
+
--
2.18.0

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