Quoting Chun-Jie Chen (2021-09-13 19:16:12)
On MT8195, tuner_en_reg is moved to register offest 0x0.
If we only judge by tuner_en_reg, it may lead to wrong address.
Add tuner_en_bit to the check condition. And it has been confirmed,
on all the MediaTek SoCs, bit0 of offset 0x0 is always occupied by
clock square control.
Signed-off-by: Chun-Jie Chen <redacted>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
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Applied to clk-next
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