Re: [PATCH v4] coresight: tmc-etr: Speed up for bounce buffer in flat mode

On 13/09/2021 18:56, Mathieu Poirier wrote:

On Sun, Sep 05, 2021 at 11:21:44AM +0800, Leo Yan wrote:

quoted

The AUX bounce buffer is allocated with API dma_alloc_coherent(), in the
low level's architecture code, e.g. for Arm64, it maps the memory with
the attribution "Normal non-cacheable"; this can be concluded from the
definition for pgprot_dmacoherent() in arch/arm64/include/asm/pgtable.h.

Later when access the AUX bounce buffer, since the memory mapping is
non-cacheable, it's low efficiency due to every load instruction must
reach out DRAM.

This patch changes to allocate pages with dma_alloc_noncoherent(), the
driver can access the memory via cacheable mapping; therefore, load
instructions can fetch data from cache lines rather than always read
data from DRAM, the driver can boost memory performance.  After using
the cacheable mapping, the driver uses dma_sync_single_for_cpu() to
invalidate cacheline prior to read bounce buffer so can avoid read stale
trace data.

By measurement the duration for function tmc_update_etr_buffer() with
ftrace function_graph tracer, it shows the performance significant
improvement for copying 4MiB data from bounce buffer:

   # echo tmc_etr_get_data_flat_buf > set_graph_notrace // avoid noise
   # echo tmc_update_etr_buffer > set_graph_function
   # echo function_graph > current_tracer

   before:

   # CPU  DURATION                  FUNCTION CALLS
   # |     |   |                     |   |   |   |
   2)               |    tmc_update_etr_buffer() {
   ...
   2) # 8148.320 us |    }

   after:

   # CPU  DURATION                  FUNCTION CALLS
   # |     |   |                     |   |   |   |
   2)               |  tmc_update_etr_buffer() {
   ...
   2) # 2525.420 us |  }

Signed-off-by: Leo Yan <redacted>
Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com>
---

Changes from v3:
Refined change to use dma_alloc_noncoherent()/dma_free_noncoherent()
(Robin Murphy);
Retested functionality and performance on Juno-r2 board.

Changes from v2:
Sync the entire buffer in one go when the tracing is wrap around
(Suzuki);
Add Suzuki's review tage.

  .../hwtracing/coresight/coresight-tmc-etr.c   | 26 ++++++++++++++++---
  1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/drivers/hwtracing/coresight/coresight-tmc-etr.c b/drivers/hwtracing/coresight/coresight-tmc-etr.c
index acdb59e0e661..a049b525a274 100644
--- a/drivers/hwtracing/coresight/coresight-tmc-etr.c
+++ b/drivers/hwtracing/coresight/coresight-tmc-etr.c

@@ -609,8 +609,9 @@ static int tmc_etr_alloc_flat_buf(struct tmc_drvdata *drvdata,
  	if (!flat_buf)
  		return -ENOMEM;
  
-	flat_buf->vaddr = dma_alloc_coherent(real_dev, etr_buf->size,
-					     &flat_buf->daddr, GFP_KERNEL);
+	flat_buf->vaddr = dma_alloc_noncoherent(real_dev, etr_buf->size,
+						&flat_buf->daddr,
+						DMA_FROM_DEVICE, GFP_KERNEL);

Suzuki and Robin - are you guys good with this new revision?

Yes, fine by me.

Suzuki

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