Re: [PATCH v2 07/17] irqchip/gic: Atomically update affinity
From: Geert Uytterhoeven <geert@linux-m68k.org>
Date: 2021-09-13 08:05:27
Also in:
linux-renesas-soc, lkml, stable
Hi Magnus, On Sun, Sep 12, 2021 at 7:40 AM Magnus Damm [off-list ref] wrote:
On Sun, Sep 12, 2021 at 4:32 AM Marc Zyngier [off-list ref] wrote:quoted
On Sat, 11 Sep 2021 03:49:20 +0100, Magnus Damm [off-list ref] wrote:quoted
On Fri, Sep 10, 2021 at 10:19 PM Geert Uytterhoeven [off-list ref] wrote:quoted
On Fri, Sep 10, 2021 at 12:23 PM Marc Zyngier [off-list ref] wrote:quoted
On Thu, 09 Sep 2021 16:22:01 +0100, Geert Uytterhoeven [off-list ref] wrote:GIC: enabling workaround for broken byte accessIndeed, byte access is unsupported according to the EMEV2 documentation. The EMEV2 documentation R19UH0036EJ0600 Chapter 7 Interrupt Control on page 97 says: "Interrupt registers can be accessed via the APB bus, in 32-bit units" "For details about register functions, see ARM Generic Interrupt Controller Architecture Specification Architecture version 1.0" The file "R19UH0036EJ0600_1Chip.pdf" is the 6th edition version published in 2010 and is not marked as confidential.This is as bad as it gets. Do you know if any other Renesas platform is affected by the same issue?Next time we have a beer together I would be happy to show you some legacy interrupt controller code. =) EMEV2 and the Emma Mobile product line came from the NEC Electronics side that got merged into Renesas Electronics in 2010. Historically NEC Electronics mainly used MIPS I've been told, and the Emma Mobile SoCs were one of the earlier Cortex-A9 adopters. That might have something to do with the rather loose interpretation of the spec.
Indeed. I used to work on products using EMMA1 and EMMA2, and they were MIPS-based (vr4120A for EMMA2, IIRC). Later variants (EMMA2H and EMMA3?) did include a small ARM core for standby control.
Renesas SoCs from a similar era: AP4 (sh7372) AP4EVB (Cortex-A8 + INTCA/INTCS)
This is no longer supported upstream (and not affected, as no GIC).
R-Mobile A1 (r8a7740) Armadillo-800-EVA (Cortex-A9 + INTCA/INTCS)
R-Mobile A1 has GIC (PL390), too, and is not affected.
R-Car M1A (r8a7778) Bock-W (Cortex-A9 + GIC) R-Car H1 (r8a7779) Marzen (4 x Cortex-A9 + GIC) Emma Mobile EMEV2 KZM9D (2 x Cortex-A9 + GIC) SH-Mobile AG5 (sh73a0) KZM9G (2 x Cortex-A9 + GIC)
All of these (except for EMEV2) are fine, too.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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