On Tue, 24 Aug 2021 16:45:23 +0100, Alexandru Elisei wrote:

Commit 31c00d2aeaa2 ("arm64: Disable fine grained traps on boot") zeroed
the fine grained trap registers to prevent unwanted register traps from
occuring. However, for the PMSNEVFR_EL1 register, the corresponding
HDFG{R,W}TR_EL2.nPMSNEVFR_EL1 fields must be 1 to disable trapping. Set
both fields to 1 if FEAT_SPEv1p2 is detected to disable read and write
traps.

Applied to arm64 (for-next/misc), thanks!

[1/1] arm64: Do not trap PMSNEVFR_EL1
      https://git.kernel.org/arm64/c/50cb99fa89aa

-- 
Catalin


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