[PATCH v11 0/4] Mediatek pinctrl patch on mt8195

STALE1774d

Revision v11 of 16 in this series.

29 messages, 4 authors, 2021-09-22 · open the first message on its own page

[PATCH v11 0/4] Mediatek pinctrl patch on mt8195

From: Zhiyong Tao <hidden>
Date: 2021-08-30 00:36:14 

This series includes 4 patches:
1.add rsel define.
2.change pull up/down description
3.add pm_ops.
4.add rsel setting.

Changes in patch v11:
1)add pm_ops fucntion support
2)change pull up/down description
3)add resistance value feature support.

Changes in patch v10:
1)fix PARENTHESIS_ALIGNMENT of mtk_pinconf_bias_set_rsel
2)fix LONG_LINE warning in 615 in pinctrl-paris.c.

Changes in patch v9:
1)fix "mtk_pinconf_bias_set_rsel" build warning.

Changes in patch v8:
1)add rsel define patch
2)avoid  CamelCase
3)add pinctrl rsel setting patch which is another resistance selection
  solution for I2C on MT8195.

Changes in patch v7:
1)add version in patch and fix spelling mistakes.

Changes in patch v6:
1)add "pintcrl: mediatek" as prefix.

Changes in patch v5:
1)document and driver patch are apploed.
2)change '-EOPNOTSUPP' to '-ENOTSUPP'

Changes in patch v4:
1)fix pinctrl-mt8195.yaml warning error.
2)remove pinctrl device node patch which is based on "mt8195.dtsi".

Changes in patch v3:
1)change '^pins' to '-pins$'.
2)change 'state_0_node_a' to 'gpio_pin' which is defined in dts.
3)change 'state_0_node_b' to 'i2c0_pin' which is defined in dts.
4)reorder this series patches. change pinctrl file and binding document
together in one patch.

There are no changes in v1 & v2.

Zhiyong Tao (4):
dt-bindings: pinctrl: mt8195: add rsel define
  dt-bindings: pinctrl: mt8195: change pull up/down description
  pinctrl: mediatek: mt8195: Add pm_ops
  pinctrl: mediatek: add rsel setting on MT8195

 .../bindings/pinctrl/pinctrl-mt8195.yaml      |  32 +++-
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 134 +++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181 ++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 include/dt-bindings/pinctrl/mt65xx.h          |   9 +
 7 files changed, 387 insertions(+), 30 deletions(-)

--
2.18.0

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[PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

From: Zhiyong Tao <hidden>
Date: 2021-08-30 00:36:25 

This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103
 
+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
+
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
-- 
2.18.0
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

From: Rob Herring <robh@kernel.org>
Date: 2021-08-31 22:09:42 

On Mon, 30 Aug 2021 08:36:00 +0800, Zhiyong Tao wrote:
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)
Acked-by: Rob Herring <robh@kernel.org>

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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

From: Chen-Yu Tsai <wenst@chromium.org>
Date: 2021-09-01 04:36:00 

On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao [off-list ref] wrote:
quoted hunk
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have no spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This
would reduce the chance of new macro values colliding with actual resistor
values set in the datasheets, plus a contiguous space would be easy to
rule as macros.

ChenYu

 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

From: zhiyong.tao <hidden>
Date: 2021-09-02 03:06:57 

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao [off-list ref] wrote:
quoted
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have no spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This
would reduce the chance of new macro values colliding with actual resistor
values set in the datasheets, plus a contiguous space would be easy to
rule as macros.

ChenYu
Hi chenyu,
By the current solution, it won't be mixed used by MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which
means how much resistor value.
We think that we don't contiguous macro space for different register. 
It may increase code complexity to make having MTK_PULL_SET_RSEL_000
defined as 104.

Thanks.

quoted
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-09-02 03:35:23 
    

  

  
On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao [off-list ref] wrote:
On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao [off-list ref] wrote:
quoted
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have no spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so on. This
would reduce the chance of new macro values colliding with actual resistor
values set in the datasheets, plus a contiguous space would be easy to
rule as macros.

ChenYu
Hi chenyu,
By the current solution, it won't be mixed used by MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which
means how much resistor value.
What I meant was that by keeping the value space tight, we avoid the
situation where in some new chip, one of the RSEL resistors happens to
be 200 or 300 ohms. 100 is already taken, so there's nothing we can
do if new designs actually do have 100 ohm settings.

We think that we don't contiguous macro space for different register.
It may increase code complexity to make having MTK_PULL_SET_RSEL_000
defined as 104.
Can you elaborate? It is a simple range check and offset handling. Are
you concerned that a new design would have R2R1R0 and you would like
the macros to be contiguous?

BTW I don't quite get why decimal base values (100, 200, etc.) were
chosen. One would think that binary bases are easier to handle in code.


ChenYu

Thanks.

quoted
quoted
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-04 08:43:13 
    

  

  
On Thu, 2021-09-02 at 11:35 +0800, Chen-Yu Tsai wrote:
On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao <zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao <
zhiyong.tao@mediatek.com> wrote:
quoted
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-
bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have no
spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so
on. This
would reduce the chance of new macro values colliding with actual
resistor
values set in the datasheets, plus a contiguous space would be
easy to
rule as macros.

ChenYu
Hi chenyu,
By the current solution, it won't be mixed used by
MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which
means how much resistor value.
What I meant was that by keeping the value space tight, we avoid the
situation where in some new chip, one of the RSEL resistors happens
to
be 200 or 300 ohms. 100 is already taken, so there's nothing we can
do if new designs actually do have 100 ohm settings.

quoted
We think that we don't contiguous macro space for different
register.
It may increase code complexity to make having
MTK_PULL_SET_RSEL_000
defined as 104.
Can you elaborate? It is a simple range check and offset handling.
Are
you concerned that a new design would have R2R1R0 and you would like
the macros to be contiguous?

BTW I don't quite get why decimal base values (100, 200, etc.) were
chosen. One would think that binary bases are easier to handle in
code.


ChenYu
Yes,we concerned that a new design would have R2R1R0 and we would like
the macros to be contiguous in the feature. we reserve it.

We think that decimal and binary base values are the same for the
feature.

quoted
Thanks.

quoted
quoted
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-09-06 08:21:04 
    

  

  
On Sat, Sep 4, 2021 at 4:40 PM zhiyong.tao [off-list ref] wrote:
On Thu, 2021-09-02 at 11:35 +0800, Chen-Yu Tsai wrote:
quoted
On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao <zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao <
zhiyong.tao@mediatek.com> wrote:
quoted
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h b/include/dt-
bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have no
spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and so
on. This
would reduce the chance of new macro values colliding with actual
resistor
values set in the datasheets, plus a contiguous space would be
easy to
rule as macros.

ChenYu
Hi chenyu,
By the current solution, it won't be mixed used by
MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define which
means how much resistor value.
What I meant was that by keeping the value space tight, we avoid the
situation where in some new chip, one of the RSEL resistors happens
to
be 200 or 300 ohms. 100 is already taken, so there's nothing we can
do if new designs actually do have 100 ohm settings.

quoted
We think that we don't contiguous macro space for different
register.
It may increase code complexity to make having
MTK_PULL_SET_RSEL_000
defined as 104.
Can you elaborate? It is a simple range check and offset handling.
Are
you concerned that a new design would have R2R1R0 and you would like
the macros to be contiguous?

BTW I don't quite get why decimal base values (100, 200, etc.) were
chosen. One would think that binary bases are easier to handle in
code.


ChenYu
Yes,we concerned that a new design would have R2R1R0 and we would like
the macros to be contiguous in the feature. we reserve it.
I see. That makes sense. Do you expect to see R3 or even R4 in the future?
Or put another way, do you expect to see resistor values of 150 or 200
supported?

Maybe we could reserve 200 and start from 201 for the RSEL macros?

Some planning needs to be done here to avoid value clashes.

We think that decimal and binary base values are the same for the
feature.
With decimal numbers you end up wasting a bit more space, since the
hardware is always using binary values. I just found it odd, that's
all.

ChenYu

quoted
quoted
Thanks.

quoted
quoted
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-09 06:53:35 
    

  

  
On Mon, 2021-09-06 at 16:20 +0800, Chen-Yu Tsai wrote:
On Sat, Sep 4, 2021 at 4:40 PM zhiyong.tao [off-list ref]
wrote:
quoted
On Thu, 2021-09-02 at 11:35 +0800, Chen-Yu Tsai wrote:
quoted
On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao <
zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao <
zhiyong.tao@mediatek.com> wrote:
quoted
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h
b/include/dt-
bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have
no
spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and
so
on. This
would reduce the chance of new macro values colliding with
actual
resistor
values set in the datasheets, plus a contiguous space would
be
easy to
rule as macros.

ChenYu
Hi chenyu,
By the current solution, it won't be mixed used by
MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define
which
means how much resistor value.
What I meant was that by keeping the value space tight, we avoid
the
situation where in some new chip, one of the RSEL resistors
happens
to
be 200 or 300 ohms. 100 is already taken, so there's nothing we
can
do if new designs actually do have 100 ohm settings.

quoted
We think that we don't contiguous macro space for different
register.
It may increase code complexity to make having
MTK_PULL_SET_RSEL_000
defined as 104.
Can you elaborate? It is a simple range check and offset
handling.
Are
you concerned that a new design would have R2R1R0 and you would
like
the macros to be contiguous?

BTW I don't quite get why decimal base values (100, 200, etc.)
were
chosen. One would think that binary bases are easier to handle in
code.


ChenYu
Yes,we concerned that a new design would have R2R1R0 and we would
like
the macros to be contiguous in the feature. we reserve it.
I see. That makes sense. Do you expect to see R3 or even R4 in the
future?
Or put another way, do you expect to see resistor values of 150 or
200
supported?

Maybe we could reserve 200 and start from 201 for the RSEL macros?

Some planning needs to be done here to avoid value clashes.
Thanks for your suggestion,we will change it to start from 201 for the
RSEL macros.

quoted
We think that decimal and binary base values are the same for the
feature.
With decimal numbers you end up wasting a bit more space, since the
hardware is always using binary values. I just found it odd, that's
all.

ChenYu

quoted
quoted
quoted
Thanks.

quoted
quoted
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-14 12:40:44 
    

  

  
On Mon, 2021-09-06 at 16:20 +0800, Chen-Yu Tsai wrote:
On Sat, Sep 4, 2021 at 4:40 PM zhiyong.tao [off-list ref]
wrote:
quoted
On Thu, 2021-09-02 at 11:35 +0800, Chen-Yu Tsai wrote:
quoted
On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao <
zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao <
zhiyong.tao@mediatek.com> wrote:
quoted
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h
b/include/dt-
bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have
no
spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and
so
on. This
would reduce the chance of new macro values colliding with
actual
resistor
values set in the datasheets, plus a contiguous space would
be
easy to
rule as macros.

ChenYu
Hi chenyu,
By the current solution, it won't be mixed used by
MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define
which
means how much resistor value.
What I meant was that by keeping the value space tight, we avoid
the
situation where in some new chip, one of the RSEL resistors
happens
to
be 200 or 300 ohms. 100 is already taken, so there's nothing we
can
do if new designs actually do have 100 ohm settings.

quoted
We think that we don't contiguous macro space for different
register.
It may increase code complexity to make having
MTK_PULL_SET_RSEL_000
defined as 104.
Can you elaborate? It is a simple range check and offset
handling.
Are
you concerned that a new design would have R2R1R0 and you would
like
the macros to be contiguous?

BTW I don't quite get why decimal base values (100, 200, etc.)
were
chosen. One would think that binary bases are easier to handle in
code.


ChenYu
Yes,we concerned that a new design would have R2R1R0 and we would
like
the macros to be contiguous in the feature. we reserve it.
I see. That makes sense. Do you expect to see R3 or even R4 in the
future?
Or put another way, do you expect to see resistor values of 150 or
200
supported?

Maybe we could reserve 200 and start from 201 for the RSEL macros?

Some planning needs to be done here to avoid value clashes.

quoted
We think that decimal and binary base values are the same for the
feature.
With decimal numbers you end up wasting a bit more space, since the
hardware is always using binary values. I just found it odd, that's
all.

ChenYu

quoted
quoted
quoted
Thanks.
Hi ChenYu,

In the next version, we provide a solution which we discussed internal
to avoid value clashes.
 
The solution:
1. We will keep the define "MTK_PULL_SET_RSEL_000 200". It won't
change.

2. We will add a property in pio dtsi node, for example,
the property name is "rsel_resistance_in_si_unit".
We will add a flag "rsel_si_unit" in pinctrl device.
in probe function, we will identify the property name
"rsel_resistance_in_si_unit" to set the flag "rsel_si_unit" value.
So it can void value clashes.

3.We will provide the define "MTK_PULL_SET_RSEL_000 200" and si unit
two solution. users can support which solution by add property
"rsel_resistance_in_si_unit" in dts node or not.

Thanks.


quoted
quoted
quoted
quoted
quoted
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
_______________________________________________
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Re: [PATCH v11 1/4] dt-bindings: pinctrl: mt8195: add rsel define

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-09-15 03:25:43 
    

  

  
On Tue, Sep 14, 2021 at 8:27 PM zhiyong.tao [off-list ref] wrote:
On Mon, 2021-09-06 at 16:20 +0800, Chen-Yu Tsai wrote:
quoted
On Sat, Sep 4, 2021 at 4:40 PM zhiyong.tao [off-list ref]
wrote:
quoted
On Thu, 2021-09-02 at 11:35 +0800, Chen-Yu Tsai wrote:
quoted
On Thu, Sep 2, 2021 at 10:54 AM zhiyong.tao <
zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 12:35 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Aug 30, 2021 at 8:36 AM Zhiyong Tao <
zhiyong.tao@mediatek.com> wrote:
quoted
This patch adds rsel define for mt8195.

Signed-off-by: Zhiyong Tao <redacted>
---
 include/dt-bindings/pinctrl/mt65xx.h | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/include/dt-bindings/pinctrl/mt65xx.h
b/include/dt-
bindings/pinctrl/mt65xx.h
index 7e16e58fe1f7..f5934abcd1bd 100644
--- a/include/dt-bindings/pinctrl/mt65xx.h
+++ b/include/dt-bindings/pinctrl/mt65xx.h
@@ -16,6 +16,15 @@
 #define MTK_PUPD_SET_R1R0_10 102
 #define MTK_PUPD_SET_R1R0_11 103

+#define MTK_PULL_SET_RSEL_000  200
+#define MTK_PULL_SET_RSEL_001  201
+#define MTK_PULL_SET_RSEL_010  202
+#define MTK_PULL_SET_RSEL_011  203
+#define MTK_PULL_SET_RSEL_100  204
+#define MTK_PULL_SET_RSEL_101  205
+#define MTK_PULL_SET_RSEL_110  206
+#define MTK_PULL_SET_RSEL_111  207
Could you keep the spacing between constants tighter, or have
no
spacing
at all? Like having MTK_PULL_SET_RSEL_000 defined as 104 and
so
on. This
would reduce the chance of new macro values colliding with
actual
resistor
values set in the datasheets, plus a contiguous space would
be
easy to
rule as macros.

ChenYu
Hi chenyu,
By the current solution, it won't be mixed used by
MTK_PULL_SET_RSEL_XXX
and real  resistor value.
If user use MTK_PULL_SET_RSEL_XXX, They don't care the define
which
means how much resistor value.
What I meant was that by keeping the value space tight, we avoid
the
situation where in some new chip, one of the RSEL resistors
happens
to
be 200 or 300 ohms. 100 is already taken, so there's nothing we
can
do if new designs actually do have 100 ohm settings.

quoted
We think that we don't contiguous macro space for different
register.
It may increase code complexity to make having
MTK_PULL_SET_RSEL_000
defined as 104.
Can you elaborate? It is a simple range check and offset
handling.
Are
you concerned that a new design would have R2R1R0 and you would
like
the macros to be contiguous?

BTW I don't quite get why decimal base values (100, 200, etc.)
were
chosen. One would think that binary bases are easier to handle in
code.


ChenYu
Yes,we concerned that a new design would have R2R1R0 and we would
like
the macros to be contiguous in the feature. we reserve it.
I see. That makes sense. Do you expect to see R3 or even R4 in the
future?
Or put another way, do you expect to see resistor values of 150 or
200
supported?

Maybe we could reserve 200 and start from 201 for the RSEL macros?

Some planning needs to be done here to avoid value clashes.

quoted
We think that decimal and binary base values are the same for the
feature.
With decimal numbers you end up wasting a bit more space, since the
hardware is always using binary values. I just found it odd, that's
all.

ChenYu

quoted
quoted
quoted
Thanks.
Hi ChenYu,

In the next version, we provide a solution which we discussed internal
to avoid value clashes.

The solution:
1. We will keep the define "MTK_PULL_SET_RSEL_000 200". It won't
change.

2. We will add a property in pio dtsi node, for example,
the property name is "rsel_resistance_in_si_unit".
We will add a flag "rsel_si_unit" in pinctrl device.
in probe function, we will identify the property name
"rsel_resistance_in_si_unit" to set the flag "rsel_si_unit" value.
So it can void value clashes.
I suppose a "mediatek," prefix should be added. And to future proof
things this should probably apply to all bias-up/down values, so
"mediatek,bias-resistance-in-si-units"?

And the description should include something like that:

  Past usage of bias-up/down values included magic numbers to specify
  different hardware configurations based on register values. This
  property specifies that all values used for bias-up/down for this
  controller shall be in SI units.

And this proposal is still subject to maintainer (not me) review.


3.We will provide the define "MTK_PULL_SET_RSEL_000 200" and si unit
two solution. users can support which solution by add property
"rsel_resistance_in_si_unit" in dts node or not.
Thanks. I think this solution does provide a clear separation of the
two value spaces.

ChenYu

quoted
quoted
quoted
quoted
quoted
quoted
 #define MTK_DRIVE_2mA  2
 #define MTK_DRIVE_4mA  4
 #define MTK_DRIVE_6mA  6
--
2.18.0
_______________________________________________
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http://lists.infradead.org/mailman/listinfo/linux-mediatek
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[PATCH v11 2/4] dt-bindings: pinctrl: mt8195: change pull up/down description

    

      From: Zhiyong Tao <hidden>

      Date: 2021-08-30 00:36:26 
    

  

  
Change pull up/down description

Signed-off-by: Zhiyong Tao <redacted>
---
 .../bindings/pinctrl/pinctrl-mt8195.yaml      | 32 +++++++++++++++++--
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
index 2f12ec59eee5..a341ed9f0095 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
@@ -85,9 +85,35 @@ patternProperties:
           2/4/6/8/10/12/14/16mA in mt8195.
         enum: [0, 1, 2, 3, 4, 5, 6, 7]
 
-      bias-pull-down: true
-
-      bias-pull-up: true
+      bias-pull-down:
+        description: |
+          For pull down type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "75000" & "5000" in mt8195.
+
+      bias-pull-up:
+        description: |
+          For pull up type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8195.
 
       bias-disable: true
 
-- 
2.18.0
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Re: [PATCH v11 2/4] dt-bindings: pinctrl: mt8195: change pull up/down description

    

      From: Rob Herring <robh@kernel.org>

      Date: 2021-08-31 22:13:04 
    

  

  
On Mon, Aug 30, 2021 at 08:36:01AM +0800, Zhiyong Tao wrote:
Change pull up/down description
Every commit is a 'change'. Your commit msg should explain 'why', not 
what the diff is.

quoted hunk
Signed-off-by: Zhiyong Tao <redacted>
---
 .../bindings/pinctrl/pinctrl-mt8195.yaml      | 32 +++++++++++++++++--
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
index 2f12ec59eee5..a341ed9f0095 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
@@ -85,9 +85,35 @@ patternProperties:
           2/4/6/8/10/12/14/16mA in mt8195.
         enum: [0, 1, 2, 3, 4, 5, 6, 7]
 
-      bias-pull-down: true
-
-      bias-pull-up: true
+      bias-pull-down:
+        description: |
+          For pull down type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "75000" & "5000" in mt8195.
Sounds like constraints on the values. Please write a schema.

+
+      bias-pull-up:
+        description: |
+          For pull up type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8195.
 
       bias-disable: true
 
-- 
2.18.0

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Re: [PATCH v11 2/4] dt-bindings: pinctrl: mt8195: change pull up/down description

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-01 02:03:21 
    

  

  
On Tue, 2021-08-31 at 17:13 -0500, Rob Herring wrote:
On Mon, Aug 30, 2021 at 08:36:01AM +0800, Zhiyong Tao wrote:
quoted
Change pull up/down description
Every commit is a 'change'. Your commit msg should explain 'why', not 
what the diff is.
Hi robh,
we will add 'why' explanation in the commit msg in v12.


quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 .../bindings/pinctrl/pinctrl-mt8195.yaml      | 32 +++++++++++++++++--
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
index 2f12ec59eee5..a341ed9f0095 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
@@ -85,9 +85,35 @@ patternProperties:
           2/4/6/8/10/12/14/16mA in mt8195.
         enum: [0, 1, 2, 3, 4, 5, 6, 7]
 
-      bias-pull-down: true
-
-      bias-pull-up: true
+      bias-pull-down:
+        description: |
+          For pull down type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "75000" & "5000" in mt8195.
Sounds like constraints on the values. Please write a schema.
we will add a schema here in v12.

Thanks
quoted
+
+      bias-pull-up:
+        description: |
+          For pull up type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8195.
 
       bias-disable: true
 
-- 
2.18.0

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Re: [PATCH v11 2/4] dt-bindings: pinctrl: mt8195: change pull up/down description

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-09-01 10:21:54 
    

  

  
On Wed, Sep 1, 2021 at 10:01 AM zhiyong.tao [off-list ref] wrote:
On Tue, 2021-08-31 at 17:13 -0500, Rob Herring wrote:
quoted
On Mon, Aug 30, 2021 at 08:36:01AM +0800, Zhiyong Tao wrote:
quoted
Change pull up/down description
Every commit is a 'change'. Your commit msg should explain 'why', not
what the diff is.
Hi robh,
we will add 'why' explanation in the commit msg in v12.


quoted
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 .../bindings/pinctrl/pinctrl-mt8195.yaml      | 32 +++++++++++++++++--
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
index 2f12ec59eee5..a341ed9f0095 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
@@ -85,9 +85,35 @@ patternProperties:
           2/4/6/8/10/12/14/16mA in mt8195.
         enum: [0, 1, 2, 3, 4, 5, 6, 7]

-      bias-pull-down: true
-
-      bias-pull-up: true
+      bias-pull-down:
+        description: |
+          For pull down type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "75000" & "5000" in mt8195.
Sounds like constraints on the values. Please write a schema.
we will add a schema here in v12.
Could the description be written to encourage device tree authors to
use SI units instead of the macros?

Thanks
ChenYu

Thanks
quoted
quoted
+
+      bias-pull-up:
+        description: |
+          For pull up type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8195.

       bias-disable: true

--
2.18.0

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Re: [PATCH v11 2/4] dt-bindings: pinctrl: mt8195: change pull up/down description

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-02 03:35:33 
    

  

  
On Wed, 2021-09-01 at 18:21 +0800, Chen-Yu Tsai wrote:
On Wed, Sep 1, 2021 at 10:01 AM zhiyong.tao [off-list ref] wrote:
quoted
On Tue, 2021-08-31 at 17:13 -0500, Rob Herring wrote:
quoted
On Mon, Aug 30, 2021 at 08:36:01AM +0800, Zhiyong Tao wrote:
quoted
Change pull up/down description
Every commit is a 'change'. Your commit msg should explain 'why', not
what the diff is.
Hi robh,
we will add 'why' explanation in the commit msg in v12.


quoted
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 .../bindings/pinctrl/pinctrl-mt8195.yaml      | 32 +++++++++++++++++--
 1 file changed, 29 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
index 2f12ec59eee5..a341ed9f0095 100644
--- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8195.yaml
@@ -85,9 +85,35 @@ patternProperties:
           2/4/6/8/10/12/14/16mA in mt8195.
         enum: [0, 1, 2, 3, 4, 5, 6, 7]

-      bias-pull-down: true
-
-      bias-pull-up: true
+      bias-pull-down:
+        description: |
+          For pull down type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull down type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull down type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "75000" & "5000" in mt8195.
Sounds like constraints on the values. Please write a schema.
we will add a schema here in v12.
Could the description be written to encourage device tree authors to
use SI units instead of the macros?

Thanks
ChenYu
In mt8195, SI units is used. we will change the description.
If user dont want to use SI units, We also provide the solution of the
macros for the solution.

quoted
Thanks
quoted
quoted
+
+      bias-pull-up:
+        description: |
+          For pull up type is normal, it don't need add RSEL & R1R0 define
+          and resistance value.
+          For pull up type is PUPD/R0/R1 type, it can add R1R0 define to
+          set different resistance. It can support "MTK_PUPD_SET_R1R0_00" &
+          "MTK_PUPD_SET_R1R0_01" & "MTK_PUPD_SET_R1R0_10" & "MTK_PUPD_SET_R1R0_11"
+          define in mt8195.
+          For pull up type is RSEL, it can add RSEL define & resistance value(ohm)
+          to set different resistance. It can support "MTK_PULL_SET_RSEL_000" &
+          "MTK_PULL_SET_RSEL_001" & "MTK_PULL_SET_RSEL_010" & "MTK_PULL_SET_RSEL_011" &
+          "MTK_PULL_SET_RSEL_100" & "MTK_PULL_SET_RSEL_101" & "MTK_PULL_SET_RSEL_110" &
+          "MTK_PULL_SET_RSEL_111" define in mt8195. It can also support resistance value(ohm)
+          "1000" & "1500" & "2000" & "3000" & "4000" & "5000" & "10000" & "75000" in mt8195.

       bias-disable: true

--
2.18.0

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[PATCH v11 3/4] pinctrl: mediatek: mt8195: Add pm_ops

    

      From: Zhiyong Tao <hidden>

      Date: 2021-08-30 00:36:29 
    

  

  
Setting this up will configure wake from suspend properly,
and wake only for the interrupts that are setup in wake_mask,
not all interrupts.

Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index a7500e18bb1d..892e79703f98 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -839,6 +839,7 @@ static struct platform_driver mt8195_pinctrl_driver = {
 	.driver = {
 		.name = "mt8195-pinctrl",
 		.of_match_table = mt8195_pinctrl_of_match,
+		.pm = &mtk_paris_pinctrl_pm_ops,
 	},
 	.probe = mt8195_pinctrl_probe,
 };
-- 
2.18.0
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Re: [PATCH v11 3/4] pinctrl: mediatek: mt8195: Add pm_ops

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-08-31 07:54:09 
    

  

  
On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao [off-list ref] wrote:
Setting this up will configure wake from suspend properly,
and wake only for the interrupts that are setup in wake_mask,
not all interrupts.
This sounds like a fix. Please add a Fixes tag for this patch. This makes
tracking things easier.

So,

Fixes: 6cf5e9ef362a ("pinctrl: add pinctrl driver on mt8195")
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

Also this patch is unrelated to the rest. You should send it separately.
This would also help the maintainer merge it directly.

quoted hunk
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index a7500e18bb1d..892e79703f98 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -839,6 +839,7 @@ static struct platform_driver mt8195_pinctrl_driver = {
        .driver = {
                .name = "mt8195-pinctrl",
                .of_match_table = mt8195_pinctrl_of_match,
+               .pm = &mtk_paris_pinctrl_pm_ops,
        },
        .probe = mt8195_pinctrl_probe,
 };
--
2.18.0
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Re: [PATCH v11 3/4] pinctrl: mediatek: mt8195: Add pm_ops

    

      From: zhiyong.tao <hidden>

      Date: 2021-08-31 09:14:28 
    

  

  
On Tue, 2021-08-31 at 15:53 +0800, Chen-Yu Tsai wrote:
On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao [off-list ref] wrote:
quoted
Setting this up will configure wake from suspend properly,
and wake only for the interrupts that are setup in wake_mask,
not all interrupts.
This sounds like a fix. Please add a Fixes tag for this patch. This makes
tracking things easier.

So,

Fixes: 6cf5e9ef362a ("pinctrl: add pinctrl driver on mt8195")
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>

Also this patch is unrelated to the rest. You should send it separately.
This would also help the maintainer merge it directly.
Hi Chen-Yu,

We will add Fixed tag for this patch and send it separately.

Thanks.

quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index a7500e18bb1d..892e79703f98 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -839,6 +839,7 @@ static struct platform_driver mt8195_pinctrl_driver = {
        .driver = {
                .name = "mt8195-pinctrl",
                .of_match_table = mt8195_pinctrl_of_match,
+               .pm = &mtk_paris_pinctrl_pm_ops,
        },
        .probe = mt8195_pinctrl_probe,
 };
--
2.18.0
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[PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: Zhiyong Tao <hidden>

      Date: 2021-08-30 00:36:31 
    

  

  
This patch provides rsel setting on MT8195

Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133 +++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181 ++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)

diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc mt8195_pin_drv_adv_range[] = {
 	PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };
 
+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[] = {
+	PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+	PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+	PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+	PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+	PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+	PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+	PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+	PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+	PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+	PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+	PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+	PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+	PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+	PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+	PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+	PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] = {
+	PIN_RSEL(8, 17, 0x0, 75000, 75000),
+	PIN_RSEL(8, 17, 0x1, 10000, 5000),
+	PIN_RSEL(8, 17, 0x2, 5000, 75000),
+	PIN_RSEL(8, 17, 0x3, 4000, 5000),
+	PIN_RSEL(8, 17, 0x4, 3000, 75000),
+	PIN_RSEL(8, 17, 0x5, 2000, 5000),
+	PIN_RSEL(8, 17, 0x6, 1500, 75000),
+	PIN_RSEL(8, 17, 0x7, 1000, 5000),
+	PIN_RSEL(29, 30, 0x0, 75000, 75000),
+	PIN_RSEL(29, 30, 0x1, 10000, 5000),
+	PIN_RSEL(29, 30, 0x2, 5000, 75000),
+	PIN_RSEL(29, 30, 0x3, 4000, 5000),
+	PIN_RSEL(29, 30, 0x4, 3000, 75000),
+	PIN_RSEL(29, 30, 0x5, 2000, 5000),
+	PIN_RSEL(29, 30, 0x6, 1500, 75000),
+	PIN_RSEL(29, 30, 0x7, 1000, 5000),
+	PIN_RSEL(34, 35, 0x0, 75000, 75000),
+	PIN_RSEL(34, 35, 0x1, 10000, 5000),
+	PIN_RSEL(34, 35, 0x2, 5000, 75000),
+	PIN_RSEL(34, 35, 0x3, 4000, 5000),
+	PIN_RSEL(34, 35, 0x4, 3000, 75000),
+	PIN_RSEL(34, 35, 0x5, 2000, 5000),
+	PIN_RSEL(34, 35, 0x6, 1500, 75000),
+	PIN_RSEL(34, 35, 0x7, 1000, 5000),
+	PIN_RSEL(44, 45, 0x0, 75000, 75000),
+	PIN_RSEL(44, 45, 0x1, 10000, 5000),
+	PIN_RSEL(44, 45, 0x2, 5000, 75000),
+	PIN_RSEL(44, 45, 0x3, 4000, 5000),
+	PIN_RSEL(44, 45, 0x4, 3000, 75000),
+	PIN_RSEL(44, 45, 0x5, 2000, 5000),
+	PIN_RSEL(44, 45, 0x6, 1500, 75000),
+	PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+	MTK_PULL_PUPD_R1R0_TYPE /* 0 */, MTK_PULL_PUPD_R1R0_TYPE /* 1 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 2 */, MTK_PULL_PUPD_R1R0_TYPE /* 3 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 4 */, MTK_PULL_PUPD_R1R0_TYPE /* 5 */,
+	MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 8 */, MTK_PULL_PU_PD_RSEL_TYPE /* 9 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 10 */, MTK_PULL_PU_PD_RSEL_TYPE /* 11 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 12 */, MTK_PULL_PU_PD_RSEL_TYPE /* 13 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 14 */, MTK_PULL_PU_PD_RSEL_TYPE /* 15 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 16 */, MTK_PULL_PU_PD_RSEL_TYPE /* 17 */,
+	MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19 */,
+	MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21 */,
+	MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23 */,
+	MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25 */,
+	MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27 */,
+	MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE /* 29 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE /* 31 */,
+	MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 34 */, MTK_PULL_PU_PD_RSEL_TYPE /* 35 */,
+	MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37 */,
+	MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39 */,
+	MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41 */,
+	MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43 */,
+	MTK_PULL_PU_PD_RSEL_TYPE /* 44 */, MTK_PULL_PU_PD_RSEL_TYPE /* 45 */,
+	MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47 */,
+	MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49 */,
+	MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51 */,
+	MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53 */,
+	MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55 */,
+	MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57 */,
+	MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59 */,
+	MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61 */,
+	MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63 */,
+	MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65 */,
+	MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67 */,
+	MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69 */,
+	MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71 */,
+	MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73 */,
+	MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75 */,
+	MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE /* 77 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 78 */, MTK_PULL_PUPD_R1R0_TYPE /* 79 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 80 */, MTK_PULL_PUPD_R1R0_TYPE /* 81 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 82 */, MTK_PULL_PUPD_R1R0_TYPE /* 83 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 84 */, MTK_PULL_PUPD_R1R0_TYPE /* 85 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 86 */, MTK_PULL_PUPD_R1R0_TYPE /* 87 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 88 */, MTK_PULL_PUPD_R1R0_TYPE /* 89 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 90 */, MTK_PULL_PUPD_R1R0_TYPE /* 91 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 92 */, MTK_PULL_PUPD_R1R0_TYPE /* 93 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 94 */, MTK_PULL_PUPD_R1R0_TYPE /* 95 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE /* 97 */,
+	MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99 */,
+	MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /* 101 */,
+	MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /* 103 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 104 */, MTK_PULL_PUPD_R1R0_TYPE /* 105 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 106 */, MTK_PULL_PUPD_R1R0_TYPE /* 107 */,
+	MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /* 109 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 110 */, MTK_PULL_PUPD_R1R0_TYPE /* 111 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 112 */, MTK_PULL_PUPD_R1R0_TYPE /* 113 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 114 */, MTK_PULL_PUPD_R1R0_TYPE /* 115 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 116 */, MTK_PULL_PUPD_R1R0_TYPE /* 117 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 118 */, MTK_PULL_PUPD_R1R0_TYPE /* 119 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 120 */, MTK_PULL_PUPD_R1R0_TYPE /* 121 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 122 */, MTK_PULL_PUPD_R1R0_TYPE /* 123 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 124 */, MTK_PULL_PUPD_R1R0_TYPE /* 125 */,
+	MTK_PULL_PUPD_R1R0_TYPE /* 126 */, MTK_PULL_PUPD_R1R0_TYPE /* 127 */,
+	MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /* 129 */,
+	MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /* 131 */,
+	MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /* 133 */,
+	MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /* 135 */,
+	MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /* 137 */,
+	MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /* 139 */,
+	MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /* 141 */,
+	MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /* 143 */,
+};
+
 static const struct mtk_pin_reg_calc mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
 	[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8195_pin_mode_range),
 	[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
 	[PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
 	[PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
 	[PINCTRL_PIN_REG_DRV_ADV] = MTK_RANGE(mt8195_pin_drv_adv_range),
+	[PINCTRL_PIN_REG_RSEL] = MTK_RANGE(mt8195_pin_rsel_range),
 };
 
 static const char * const mt8195_pinctrl_register_base_names[] = {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data = {
 	.gpio_m = 0,
 	.base_names = mt8195_pinctrl_register_base_names,
 	.nbase_names = ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+	.pull_type = mt8195_pull_type,
+	.pin_rsel = mt8195_pin_rsel_val_range,
+	.npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
 	.bias_set_combo = mtk_pinconf_bias_set_combo,
 	.bias_get_combo = mtk_pinconf_bias_get_combo,
 	.drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
 	} else if (arg == MTK_PUPD_SET_R1R0_11) {
 		r0 = 1;
 		r1 = 1;
+	} else if (arg == MTK_ENABLE) {
+		r0 = 1;
+		r1 = 0;
 	} else {
 		err = -EINVAL;
 		goto out;
@@ -661,6 +664,75 @@ static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
 	return err;
 }
 
+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+				  const struct mtk_pin_desc *desc,
+				  u32 pullup, u32 arg, u32 *rsel_val)
+{
+	const struct mtk_pin_rsel *rsel;
+	int check;
+	bool found = false;
+
+	rsel = hw->soc->pin_rsel;
+
+	for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
+		if (desc->number >= rsel[check].s_pin &&
+		    desc->number <= rsel[check].e_pin) {
+			if (pullup) {
+				if (rsel[check].up_rsel == arg) {
+					found = true;
+					*rsel_val = rsel[check].rsel_index;
+					break;
+				}
+			} else {
+				if (rsel[check].down_rsel == arg) {
+					found = true;
+					*rsel_val = rsel[check].rsel_index;
+					break;
+				}
+			}
+		}
+	}
+
+	if (!found) {
+		dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n",
+			arg, desc->number, desc->name);
+		return -EOPNOTSUPP;
+	}
+
+	return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+				     const struct mtk_pin_desc *desc,
+				     u32 pullup, u32 arg)
+{
+	int err, rsel_val;
+
+	if (hw->soc->pin_rsel) {
+		/* find pin rsel_index from pin_rsel array*/
+		err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val);
+		if (err)
+			goto out;
+	} else {
+		if (arg < MTK_PULL_SET_RSEL_000 ||
+		    arg > MTK_PULL_SET_RSEL_111) {
+			err = -EINVAL;
+			goto out;
+		}
+
+		rsel_val -= MTK_PULL_SET_RSEL_000;
+	}
+
+	err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val);
+	if (err)
+		goto out;
+
+	err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE);
+
+out:
+	return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
 				const struct mtk_pin_desc *desc,
 				u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
 	return err;
 }
 
-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-				const struct mtk_pin_desc *desc,
-				u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+				     const struct mtk_pin_desc *desc,
+				     u32 *pullup, u32 *enable)
 {
-	int err;
+	int pu, pd, rsel, err;
 
-	err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
-	if (!err)
+	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel);
+	if (err)
 		goto out;
 
-	err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg);
-	if (!err)
+	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu);
+	if (err)
 		goto out;
 
-	err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
+	err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd);
+
+	if (pu == 0 && pd == 0) {
+		*pullup = 0;
+		*enable = MTK_DISABLE;
+	} else if (pu == 1 && pd == 0) {
+		*pullup = 1;
+		*enable = rsel + MTK_PULL_SET_RSEL_000;
+	} else if (pu == 0 && pd == 1) {
+		*pullup = 0;
+		*enable = rsel + MTK_PULL_SET_RSEL_000;
+	} else {
+		err = -EINVAL;
+		goto out;
+	}
 
 out:
 	return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+			       const struct mtk_pin_desc *desc,
+			       u32 pullup, u32 arg)
+{
+	int err = -EOPNOTSUPP;
+	bool try_all_type;
+
+	try_all_type = hw->soc->pull_type ? false : true;
+
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_RSEL_TYPE)) {
+		err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg);
+		if (!err)
+			return err;
+	}
+
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_PU_PD_TYPE)) {
+		err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
+		if (!err)
+			return err;
+	}
+
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_PULLSEL_TYPE)) {
+		err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
+							  pullup, arg);
+		if (!err)
+			return err;
+	}
+
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_PUPD_R1R0_TYPE)) {
+		err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
+		if (err)
+			dev_err(hw->dev, "Invalid pull argument\n");
+	}
+
+	return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);
 
 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
 			      const struct mtk_pin_desc *desc,
 			      u32 *pullup, u32 *enable)
 {
-	int err;
+	int err = -EOPNOTSUPP;
+	bool try_all_type;
 
-	err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
-	if (!err)
-		goto out;
+	try_all_type = hw->soc->pull_type ? false : true;
 
-	err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable);
-	if (!err)
-		goto out;
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_RSEL_TYPE)) {
+		err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable);
+		if (!err)
+			return err;
+	}
+
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_PU_PD_TYPE)) {
+		err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
+		if (!err)
+			return err;
+	}
 
-	err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_PULLSEL_TYPE)) {
+		err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
+							  pullup, enable);
+		if (!err)
+			return err;
+	}
+
+	if (try_all_type ||
+	    (hw->soc->pull_type[desc->number] & MTK_PULL_PUPD_R1R0_TYPE))
+		err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);
 
-out:
 	return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE		BIT(0)
+#define MTK_PULL_PULLSEL_TYPE		BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE		BIT(2)
+#define MTK_PULL_RSEL_TYPE		BIT(3)
+#define MTK_PULL_PU_PD_RSEL_TYPE	(MTK_PULL_PU_PD_TYPE \
+					| MTK_PULL_RSEL_TYPE)
+
 
 #define EINT_NA	U16_MAX
 #define NO_EINT_SUPPORT	EINT_NA
@@ -42,6 +49,14 @@
 	PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,	\
 		       _x_bits, 32, 1)
 
+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl, _down_rsel) {	\
+		.s_pin = _s_pin,					\
+		.e_pin = _e_pin,					\
+		.rsel_index = _rsel_index,				\
+		.up_rsel = _up_resl,					\
+		.down_rsel = _down_rsel,				\
+	}
+
 /* List these attributes which could be modified for the pin */
 enum {
 	PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
 	PINCTRL_PIN_REG_DRV_E0,
 	PINCTRL_PIN_REG_DRV_E1,
 	PINCTRL_PIN_REG_DRV_ADV,
+	PINCTRL_PIN_REG_RSEL,
 	PINCTRL_PIN_REG_MAX,
 };
 
@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
 	u8  fixed;
 };
 
+/* struct mtk_pin_rsel - the structure that providing bias resistance selection.
+ * @s_pin:		the start pin within the rsel range
+ * @e_pin:		the end pin within the rsel range
+ * @rsel_index:	the rsel bias resistance index
+ * @up_rsel:	the pullup rsel bias resistance value
+ * @down_rsel:	the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+	u16 s_pin;
+	u16 e_pin;
+	u16 rsel_index;
+	u32 up_rsel;
+	u32 down_rsel;
+};
+
 /* struct mtk_pin_reg_calc - the structure that holds all ranges used to
  *			     determine which register the pin would make use of
  *			     for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
 	bool				ies_present;
 	const char * const		*base_names;
 	unsigned int			nbase_names;
+	const unsigned int		*pull_type;
+	const struct mtk_pin_rsel	*pin_rsel;
+	unsigned int			npin_rsel;
 
 	/* Specific pinconfig operations */
 	int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
 			     const struct mtk_pin_desc *desc, u32 arg);
 	int (*adv_drive_get)(struct mtk_pinctrl *hw,
 			     const struct mtk_pin_desc *desc, u32 *val);
-
 	/* Specific driver data */
 	void				*driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int
 	mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)
 
 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-	unsigned int gpio, char *buf, unsigned int bufLen)
+	unsigned int gpio, char *buf, unsigned int buf_len)
 {
-	int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+	int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1, rsel = -1;
 	const struct mtk_pin_desc *desc;
 
 	if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
 		pinmux -= hw->soc->nfuncs;
 
 	mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+
+	/* Case for: R1R0 */
 	if (pullen == MTK_PUPD_SET_R1R0_00) {
 		pullen = 0;
 		r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
 		pullen = 1;
 		r1 = 1;
 		r0 = 1;
-	} else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
-		pullen = 0;
 	}
-	len += scnprintf(buf + len, bufLen - len,
+
+	/* Case for: RSEL */
+	if (pullen >= MTK_PULL_SET_RSEL_000 &&
+	    pullen <= MTK_PULL_SET_RSEL_111) {
+		rsel = pullen - MTK_PULL_SET_RSEL_000;
+		pullen = 1;
+	}
+
+	len += scnprintf(buf + len, buf_len - len,
 			"%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
 			gpio,
 			pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
 			pullup);
 
 	if (r1 != -1) {
-		len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n",
+		len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n",
 			r1, r0);
+	} else if (rsel != -1) {
+		len += scnprintf(buf + len, buf_len - len, " (%1d)\n", rsel);
 	} else {
-		len += scnprintf(buf + len, bufLen - len, "\n");
+		len += scnprintf(buf + len, buf_len - len, "\n");
 	}
 
 	return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev,
 			    const struct mtk_pin_soc *soc);
 
 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-	unsigned int gpio, char *buf, unsigned int bufLen);
+	unsigned int gpio, char *buf, unsigned int buf_len);
 
 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;
 
-- 
2.18.0
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-09-01 10:10:18 
    

  

  
Hi,

On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao [off-list ref] wrote:
This patch provides rsel setting on MT8195
A bit more context, like what is rsel, would be nice.

Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133 +++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181 ++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)
Could you split this patch into two, so the common parts are in the first
patch, and the mt8195 specific changes are in the second?

quoted hunk
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };

+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[] = {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] = {
+       PIN_RSEL(8, 17, 0x0, 75000, 75000),
+       PIN_RSEL(8, 17, 0x1, 10000, 5000),
+       PIN_RSEL(8, 17, 0x2, 5000, 75000),
+       PIN_RSEL(8, 17, 0x3, 4000, 5000),
+       PIN_RSEL(8, 17, 0x4, 3000, 75000),
+       PIN_RSEL(8, 17, 0x5, 2000, 5000),
+       PIN_RSEL(8, 17, 0x6, 1500, 75000),
+       PIN_RSEL(8, 17, 0x7, 1000, 5000),
+       PIN_RSEL(29, 30, 0x0, 75000, 75000),
+       PIN_RSEL(29, 30, 0x1, 10000, 5000),
+       PIN_RSEL(29, 30, 0x2, 5000, 75000),
+       PIN_RSEL(29, 30, 0x3, 4000, 5000),
+       PIN_RSEL(29, 30, 0x4, 3000, 75000),
+       PIN_RSEL(29, 30, 0x5, 2000, 5000),
+       PIN_RSEL(29, 30, 0x6, 1500, 75000),
+       PIN_RSEL(29, 30, 0x7, 1000, 5000),
+       PIN_RSEL(34, 35, 0x0, 75000, 75000),
+       PIN_RSEL(34, 35, 0x1, 10000, 5000),
+       PIN_RSEL(34, 35, 0x2, 5000, 75000),
+       PIN_RSEL(34, 35, 0x3, 4000, 5000),
+       PIN_RSEL(34, 35, 0x4, 3000, 75000),
+       PIN_RSEL(34, 35, 0x5, 2000, 5000),
+       PIN_RSEL(34, 35, 0x6, 1500, 75000),
+       PIN_RSEL(34, 35, 0x7, 1000, 5000),
+       PIN_RSEL(44, 45, 0x0, 75000, 75000),
+       PIN_RSEL(44, 45, 0x1, 10000, 5000),
+       PIN_RSEL(44, 45, 0x2, 5000, 75000),
+       PIN_RSEL(44, 45, 0x3, 4000, 5000),
+       PIN_RSEL(44, 45, 0x4, 3000, 75000),
+       PIN_RSEL(44, 45, 0x5, 2000, 5000),
+       PIN_RSEL(44, 45, 0x6, 1500, 75000),
+       PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+       MTK_PULL_PUPD_R1R0_TYPE /* 0 */, MTK_PULL_PUPD_R1R0_TYPE /* 1 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 2 */, MTK_PULL_PUPD_R1R0_TYPE /* 3 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 4 */, MTK_PULL_PUPD_R1R0_TYPE /* 5 */,
+       MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 8 */, MTK_PULL_PU_PD_RSEL_TYPE /* 9 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 10 */, MTK_PULL_PU_PD_RSEL_TYPE /* 11 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 12 */, MTK_PULL_PU_PD_RSEL_TYPE /* 13 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 14 */, MTK_PULL_PU_PD_RSEL_TYPE /* 15 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 16 */, MTK_PULL_PU_PD_RSEL_TYPE /* 17 */,
+       MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19 */,
+       MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21 */,
+       MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23 */,
+       MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25 */,
+       MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27 */,
+       MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE /* 29 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE /* 31 */,
+       MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 34 */, MTK_PULL_PU_PD_RSEL_TYPE /* 35 */,
+       MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37 */,
+       MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39 */,
+       MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41 */,
+       MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 44 */, MTK_PULL_PU_PD_RSEL_TYPE /* 45 */,
+       MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47 */,
+       MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49 */,
+       MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51 */,
+       MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53 */,
+       MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55 */,
+       MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57 */,
+       MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59 */,
+       MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61 */,
+       MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63 */,
+       MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65 */,
+       MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67 */,
+       MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69 */,
+       MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71 */,
+       MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73 */,
+       MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75 */,
+       MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE /* 77 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 78 */, MTK_PULL_PUPD_R1R0_TYPE /* 79 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 80 */, MTK_PULL_PUPD_R1R0_TYPE /* 81 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 82 */, MTK_PULL_PUPD_R1R0_TYPE /* 83 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 84 */, MTK_PULL_PUPD_R1R0_TYPE /* 85 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 86 */, MTK_PULL_PUPD_R1R0_TYPE /* 87 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 88 */, MTK_PULL_PUPD_R1R0_TYPE /* 89 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 90 */, MTK_PULL_PUPD_R1R0_TYPE /* 91 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 92 */, MTK_PULL_PUPD_R1R0_TYPE /* 93 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 94 */, MTK_PULL_PUPD_R1R0_TYPE /* 95 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE /* 97 */,
+       MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99 */,
+       MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /* 101 */,
+       MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /* 103 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 104 */, MTK_PULL_PUPD_R1R0_TYPE /* 105 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 106 */, MTK_PULL_PUPD_R1R0_TYPE /* 107 */,
+       MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /* 109 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 110 */, MTK_PULL_PUPD_R1R0_TYPE /* 111 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 112 */, MTK_PULL_PUPD_R1R0_TYPE /* 113 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 114 */, MTK_PULL_PUPD_R1R0_TYPE /* 115 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 116 */, MTK_PULL_PUPD_R1R0_TYPE /* 117 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 118 */, MTK_PULL_PUPD_R1R0_TYPE /* 119 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 120 */, MTK_PULL_PUPD_R1R0_TYPE /* 121 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 122 */, MTK_PULL_PUPD_R1R0_TYPE /* 123 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 124 */, MTK_PULL_PUPD_R1R0_TYPE /* 125 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 126 */, MTK_PULL_PUPD_R1R0_TYPE /* 127 */,
+       MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /* 129 */,
+       MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /* 131 */,
+       MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /* 133 */,
+       MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /* 135 */,
+       MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /* 137 */,
+       MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /* 139 */,
+       MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /* 141 */,
+       MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /* 143 */,
+};
+
 static const struct mtk_pin_reg_calc mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] = MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] = MTK_RANGE(mt8195_pin_rsel_range),
 };

 static const char * const mt8195_pinctrl_register_base_names[] = {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data = {
        .gpio_m = 0,
        .base_names = mt8195_pinctrl_register_base_names,
        .nbase_names = ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+       .pull_type = mt8195_pull_type,
+       .pin_rsel = mt8195_pin_rsel_val_range,
+       .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
        .bias_set_combo = mtk_pinconf_bias_set_combo,
        .bias_get_combo = mtk_pinconf_bias_get_combo,
        .drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        } else if (arg == MTK_PUPD_SET_R1R0_11) {
                r0 = 1;
                r1 = 1;
+       } else if (arg == MTK_ENABLE) {
+               r0 = 1;
+               r1 = 0;
This change does not seem related. This should be in a separate patch
and why and what this change is should be described in the commit log.
I assume this is to support "bias-pull-up" or "bias-pull-down" without
arguments on pins using R1R0?

quoted hunk
        } else {
                err = -EINVAL;
                goto out;
@@ -661,6 +664,75 @@ static int mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        return err;
 }

+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+                                 const struct mtk_pin_desc *desc,
+                                 u32 pullup, u32 arg, u32 *rsel_val)
+{
+       const struct mtk_pin_rsel *rsel;
+       int check;
+       bool found = false;
+
+       rsel = hw->soc->pin_rsel;
+
+       for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
+               if (desc->number >= rsel[check].s_pin &&
+                   desc->number <= rsel[check].e_pin) {
+                       if (pullup) {
+                               if (rsel[check].up_rsel == arg) {
+                                       found = true;
+                                       *rsel_val = rsel[check].rsel_index;
+                                       break;
+                               }
+                       } else {
+                               if (rsel[check].down_rsel == arg) {
+                                       found = true;
+                                       *rsel_val = rsel[check].rsel_index;
+                                       break;
+                               }
+                       }
+               }
+       }
+
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d Ohm for pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be network related.

I also think it would make sense to differentiate between the pin not
supporting RSEL (return -ENOTSUPP) vs supporting RSEL but a resistor
value not in the table was requested (return -EINVAL). This might be
easier to do with the two-table design I mentioned.

+       }
+
+       return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc *desc,
+                                    u32 pullup, u32 arg)
+{
+       int err, rsel_val;
+
+       if (hw->soc->pin_rsel) {
+               /* find pin rsel_index from pin_rsel array*/
+               err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg, &rsel_val);
+               if (err)
+                       goto out;
+       } else {
+               if (arg < MTK_PULL_SET_RSEL_000 ||
+                   arg > MTK_PULL_SET_RSEL_111) {
+                       err = -EINVAL;
+                       goto out;
+               }
+
+               rsel_val -= MTK_PULL_SET_RSEL_000;
+       }
This is not structured correctly. Think about this: on a chip, say MT8195,
which has hw->soc->pin_rsel defined, but the device tree writer chose
to use the macros instead of SI unit values. This is exactly the scenario
you discussed privately with me.

This also fails the case where bias-pull-{up,down} is specified without
an argument, in which case arg == 1. This does seem to be covered by
falling back to just PU/PD, but it's not exactly obvious, especially
since we are skipping mtk_pinconf_bias_set_pu_pd() just below.

So you actually need to check for the magic values first, and if arg
doesn't match any of them, assume an SI unit argument and try to do
a lookup.

quoted hunk
+
+       err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL, rsel_val);
+       if (err)
+               goto out;
+
+       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, MTK_ENABLE);
+
+out:
+       return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
                                const struct mtk_pin_desc *desc,
                                u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
This hunk is somewhat whacky. I assume it's because you also fixed up
the indentation for mtk_pinconf_bias_set_combo(). While nice to do,
in this case it actually works against having an easy to read patch.

        return err;
 }

-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-                               const struct mtk_pin_desc *desc,
-                               u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc *desc,
+                                    u32 *pullup, u32 *enable)
 {
-       int err;
+       int pu, pd, rsel, err;

-       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL, &rsel);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup, arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd);
Maybe this could reuse mtk_pinconf_bias_get_pu_pd(), much like on the `set`
side?

+
+       if (pu == 0 && pd == 0) {
+               *pullup = 0;
+               *enable = MTK_DISABLE;
+       } else if (pu == 1 && pd == 0) {
+               *pullup = 1;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else if (pu == 0 && pd == 1) {
+               *pullup = 0;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else {
+               err = -EINVAL;
+               goto out;
+       }

 out:
        return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+                              const struct mtk_pin_desc *desc,
+                              u32 pullup, u32 arg)
+{
+       int err = -EOPNOTSUPP;
+       bool try_all_type;
+
+       try_all_type = hw->soc->pull_type ? false : true;
Using ternary ops is discouraged. Maybe this could be structured like:

    u32 pull_type;

    if (hw->soc->pull_type)
            pull_type = hw->soc->pull_type[desc->number];
    else
            pull_type = MTK_PULL_TYPE_MASK;

That way you don't need to test `try_all_type` every time.

+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_rsel(hw, desc, pullup, arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
+                                                         pullup, arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_PUPD_R1R0_TYPE)) {
+               err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup, arg);
+               if (err)
+                       dev_err(hw->dev, "Invalid pull argument\n");
The "if (err)" could be moved outside the upper "if" block. That way
the code flow looks more consistent, plus we get an error message
regardless of the pull type supported.

+       }
+
+       return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);

 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
                              const struct mtk_pin_desc *desc,
                              u32 *pullup, u32 *enable)
 {
-       int err;
+       int err = -EOPNOTSUPP;
+       bool try_all_type;

-       err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
-       if (!err)
-               goto out;
+       try_all_type = hw->soc->pull_type ? false : true;
Same here.

quoted hunk
-       err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup, enable);
-       if (!err)
-               goto out;
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_rsel(hw, desc, pullup, enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
+               if (!err)
+                       return err;
+       }

-       err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
+                                                         pullup, enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] & MTK_PULL_PUPD_R1R0_TYPE))
+               err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup, enable);

-out:
        return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE            BIT(0)
+#define MTK_PULL_PULLSEL_TYPE          BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE                BIT(2)
+#define MTK_PULL_RSEL_TYPE             BIT(3)
+#define MTK_PULL_PU_PD_RSEL_TYPE       (MTK_PULL_PU_PD_TYPE \
+                                       | MTK_PULL_RSEL_TYPE)
MTK_PULL_RSEL_TYPE deserves a comment saying why it should not be used
on its own.

But since mtk_pinconf_bias_set_rsel() is already calling
mtk_pinconf_bias_set_pu_pd(), if the former function is reworked, then
the two types don't need to be combined for the fallback behavior.

quoted hunk
+

 #define EINT_NA        U16_MAX
 #define NO_EINT_SUPPORT        EINT_NA
@@ -42,6 +49,14 @@
        PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs, _s_bit,    \
                       _x_bits, 32, 1)

+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl, _down_rsel) {  \
                                                    ^ rsel?

quoted hunk
+               .s_pin = _s_pin,                                        \
+               .e_pin = _e_pin,                                        \
+               .rsel_index = _rsel_index,                              \
+               .up_rsel = _up_resl,                                    \
+               .down_rsel = _down_rsel,                                \
+       }
+
 /* List these attributes which could be modified for the pin */
 enum {
        PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };

@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
        u8  fixed;
 };

+/* struct mtk_pin_rsel - the structure that providing bias resistance selection.
                                               ^ provides

+ * @s_pin:             the start pin within the rsel range
+ * @e_pin:             the end pin within the rsel range
+ * @rsel_index:        the rsel bias resistance index
+ * @up_rsel:   the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+       u16 s_pin;
+       u16 e_pin;
+       u16 rsel_index;
+       u32 up_rsel;
+       u32 down_rsel;
+};
+
If it were up to me, I would split this into two layers, one for the
register value <-> resistor value mapping, lets call it "rsel table",
and the other for pin <-> "rsel table" mapping.

I assume most if not all pins that support rsel would have the same set
of resistor values, so that would trade a level of indirection for better
usage of space.

quoted hunk
 /* struct mtk_pin_reg_calc - the structure that holds all ranges used to
  *                          determine which register the pin would make use of
  *                          for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
        bool                            ies_present;
        const char * const              *base_names;
        unsigned int                    nbase_names;
+       const unsigned int              *pull_type;
+       const struct mtk_pin_rsel       *pin_rsel;
+       unsigned int                    npin_rsel;

        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc *desc, u32 arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc *desc, u32 *val);
-
Unrelated whitespace change. Please remove it.

quoted hunk
        /* Specific driver data */
        void                            *driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct mtk_pinctrl *hw, unsigned int gpio, int
        mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen)
+       unsigned int gpio, char *buf, unsigned int buf_len)
Unrelated change.

quoted hunk
 {
-       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1, rsel = -1;
        const struct mtk_pin_desc *desc;

        if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
                pinmux -= hw->soc->nfuncs;

        mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+
+       /* Case for: R1R0 */
        if (pullen == MTK_PUPD_SET_R1R0_00) {
                pullen = 0;
                r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
                pullen = 1;
                r1 = 1;
                r0 = 1;
-       } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
-               pullen = 0;
        }
-       len += scnprintf(buf + len, bufLen - len,
+
+       /* Case for: RSEL */
+       if (pullen >= MTK_PULL_SET_RSEL_000 &&
+           pullen <= MTK_PULL_SET_RSEL_111) {
+               rsel = pullen - MTK_PULL_SET_RSEL_000;
+               pullen = 1;
+       }
+
+       len += scnprintf(buf + len, buf_len - len,
Unrelated change.

quoted hunk
                        "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
                        gpio,
                        pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
                        pullup);

        if (r1 != -1) {
-               len += scnprintf(buf + len, bufLen - len, " (%1d %1d)\n",
+               len += scnprintf(buf + len, buf_len - len, " (%1d %1d)\n",
                        r1, r0);
+       } else if (rsel != -1) {
+               len += scnprintf(buf + len, buf_len - len, " (%1d)\n", rsel);
        } else {
-               len += scnprintf(buf + len, bufLen - len, "\n");
+               len += scnprintf(buf + len, buf_len - len, "\n");
Unrelated changes.

quoted hunk
        }

        return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct platform_device *pdev,
                            const struct mtk_pin_soc *soc);

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen);
+       unsigned int gpio, char *buf, unsigned int buf_len);
Unrelated change.


Regards
ChenYu

 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;

--
2.18.0
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-06 03:30:05 
    

  

  
On Wed, 2021-09-01 at 18:10 +0800, Chen-Yu Tsai wrote:
Hi,

On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao <zhiyong.tao@mediatek.com
quoted
wrote:

This patch provides rsel setting on MT8195
A bit more context, like what is rsel, would be nice.
we will add more context it in the next version.
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133 +++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181
++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)
Could you split this patch into two, so the common parts are in the
first
patch, and the mt8195 specific changes are in the second?
ok, we will split in the next version.

quoted
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc
mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };

+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[] = {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] = {
+       PIN_RSEL(8, 17, 0x0, 75000, 75000),
+       PIN_RSEL(8, 17, 0x1, 10000, 5000),
+       PIN_RSEL(8, 17, 0x2, 5000, 75000),
+       PIN_RSEL(8, 17, 0x3, 4000, 5000),
+       PIN_RSEL(8, 17, 0x4, 3000, 75000),
+       PIN_RSEL(8, 17, 0x5, 2000, 5000),
+       PIN_RSEL(8, 17, 0x6, 1500, 75000),
+       PIN_RSEL(8, 17, 0x7, 1000, 5000),
+       PIN_RSEL(29, 30, 0x0, 75000, 75000),
+       PIN_RSEL(29, 30, 0x1, 10000, 5000),
+       PIN_RSEL(29, 30, 0x2, 5000, 75000),
+       PIN_RSEL(29, 30, 0x3, 4000, 5000),
+       PIN_RSEL(29, 30, 0x4, 3000, 75000),
+       PIN_RSEL(29, 30, 0x5, 2000, 5000),
+       PIN_RSEL(29, 30, 0x6, 1500, 75000),
+       PIN_RSEL(29, 30, 0x7, 1000, 5000),
+       PIN_RSEL(34, 35, 0x0, 75000, 75000),
+       PIN_RSEL(34, 35, 0x1, 10000, 5000),
+       PIN_RSEL(34, 35, 0x2, 5000, 75000),
+       PIN_RSEL(34, 35, 0x3, 4000, 5000),
+       PIN_RSEL(34, 35, 0x4, 3000, 75000),
+       PIN_RSEL(34, 35, 0x5, 2000, 5000),
+       PIN_RSEL(34, 35, 0x6, 1500, 75000),
+       PIN_RSEL(34, 35, 0x7, 1000, 5000),
+       PIN_RSEL(44, 45, 0x0, 75000, 75000),
+       PIN_RSEL(44, 45, 0x1, 10000, 5000),
+       PIN_RSEL(44, 45, 0x2, 5000, 75000),
+       PIN_RSEL(44, 45, 0x3, 4000, 5000),
+       PIN_RSEL(44, 45, 0x4, 3000, 75000),
+       PIN_RSEL(44, 45, 0x5, 2000, 5000),
+       PIN_RSEL(44, 45, 0x6, 1500, 75000),
+       PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+       MTK_PULL_PUPD_R1R0_TYPE /* 0 */, MTK_PULL_PUPD_R1R0_TYPE /*
1 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 2 */, MTK_PULL_PUPD_R1R0_TYPE /*
3 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 4 */, MTK_PULL_PUPD_R1R0_TYPE /*
5 */,
+       MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 8 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 9 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 10 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 11 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 12 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 13 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 14 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 15 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 16 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 17 */,
+       MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19 */,
+       MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21 */,
+       MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23 */,
+       MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25 */,
+       MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27 */,
+       MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE /*
29 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE /*
31 */,
+       MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 34 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 35 */,
+       MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37 */,
+       MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39 */,
+       MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41 */,
+       MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 44 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 45 */,
+       MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47 */,
+       MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49 */,
+       MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51 */,
+       MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53 */,
+       MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55 */,
+       MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57 */,
+       MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59 */,
+       MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61 */,
+       MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63 */,
+       MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65 */,
+       MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67 */,
+       MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69 */,
+       MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71 */,
+       MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73 */,
+       MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75 */,
+       MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE /* 77
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 78 */, MTK_PULL_PUPD_R1R0_TYPE
/* 79 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 80 */, MTK_PULL_PUPD_R1R0_TYPE
/* 81 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 82 */, MTK_PULL_PUPD_R1R0_TYPE
/* 83 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 84 */, MTK_PULL_PUPD_R1R0_TYPE
/* 85 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 86 */, MTK_PULL_PUPD_R1R0_TYPE
/* 87 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 88 */, MTK_PULL_PUPD_R1R0_TYPE
/* 89 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 90 */, MTK_PULL_PUPD_R1R0_TYPE
/* 91 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 92 */, MTK_PULL_PUPD_R1R0_TYPE
/* 93 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 94 */, MTK_PULL_PUPD_R1R0_TYPE
/* 95 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE /* 97
*/,
+       MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99 */,
+       MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /* 101
*/,
+       MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /* 103
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 104 */, MTK_PULL_PUPD_R1R0_TYPE
/* 105 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 106 */, MTK_PULL_PUPD_R1R0_TYPE
/* 107 */,
+       MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /* 109
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 110 */, MTK_PULL_PUPD_R1R0_TYPE
/* 111 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 112 */, MTK_PULL_PUPD_R1R0_TYPE
/* 113 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 114 */, MTK_PULL_PUPD_R1R0_TYPE
/* 115 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 116 */, MTK_PULL_PUPD_R1R0_TYPE
/* 117 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 118 */, MTK_PULL_PUPD_R1R0_TYPE
/* 119 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 120 */, MTK_PULL_PUPD_R1R0_TYPE
/* 121 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 122 */, MTK_PULL_PUPD_R1R0_TYPE
/* 123 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 124 */, MTK_PULL_PUPD_R1R0_TYPE
/* 125 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 126 */, MTK_PULL_PUPD_R1R0_TYPE
/* 127 */,
+       MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /* 129
*/,
+       MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /* 131
*/,
+       MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /* 133
*/,
+       MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /* 135
*/,
+       MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /* 137
*/,
+       MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /* 139
*/,
+       MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /* 141
*/,
+       MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /* 143
*/,
+};
+
 static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] =
MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] = MTK_RANGE(mt8195_pin_rsel_range),
 };

 static const char * const mt8195_pinctrl_register_base_names[] = {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data = {
        .gpio_m = 0,
        .base_names = mt8195_pinctrl_register_base_names,
        .nbase_names =
ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+       .pull_type = mt8195_pull_type,
+       .pin_rsel = mt8195_pin_rsel_val_range,
+       .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
        .bias_set_combo = mtk_pinconf_bias_set_combo,
        .bias_get_combo = mtk_pinconf_bias_get_combo,
        .drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        } else if (arg == MTK_PUPD_SET_R1R0_11) {
                r0 = 1;
                r1 = 1;
+       } else if (arg == MTK_ENABLE) {
+               r0 = 1;
+               r1 = 0;
This change does not seem related. This should be in a separate patch
and why and what this change is should be described in the commit
log.
I assume this is to support "bias-pull-up" or "bias-pull-down"
without
arguments on pins using R1R0?
we will separate it in next version.
some users want only pull up/down, they don't care about the resistance
value. So we support the case which only use "bias-pull-up" or "bias-
pull-down" without arguments on pins using R1R0.

quoted
        } else {
                err = -EINVAL;
                goto out;
@@ -661,6 +664,75 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        return err;
 }

+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+                                 const struct mtk_pin_desc *desc,
+                                 u32 pullup, u32 arg, u32
*rsel_val)
+{
+       const struct mtk_pin_rsel *rsel;
+       int check;
+       bool found = false;
+
+       rsel = hw->soc->pin_rsel;
+
+       for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
+               if (desc->number >= rsel[check].s_pin &&
+                   desc->number <= rsel[check].e_pin) {
+                       if (pullup) {
+                               if (rsel[check].up_rsel == arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       } else {
+                               if (rsel[check].down_rsel == arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       }
+               }
+       }
+
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d Ohm for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP is not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.


I also think it would make sense to differentiate between the pin not
supporting RSEL (return -ENOTSUPP) vs supporting RSEL but a resistor
value not in the table was requested (return -EINVAL). This might be
easier to do with the two-table design I mentioned.
It only support resistor value on the patch on mt8195. we think we need
only maintain one-table design.

quoted
+       }
+
+       return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 pullup, u32 arg)
+{
+       int err, rsel_val;
+
+       if (hw->soc->pin_rsel) {
+               /* find pin rsel_index from pin_rsel array*/
+               err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg,
&rsel_val);
+               if (err)
+                       goto out;
+       } else {
+               if (arg < MTK_PULL_SET_RSEL_000 ||
+                   arg > MTK_PULL_SET_RSEL_111) {
+                       err = -EINVAL;
+                       goto out;
+               }
+
+               rsel_val -= MTK_PULL_SET_RSEL_000;
+       }
This is not structured correctly. Think about this: on a chip, say
MT8195,
which has hw->soc->pin_rsel defined, but the device tree writer chose
to use the macros instead of SI unit values. This is exactly the
scenario
you discussed privately with me.

This also fails the case where bias-pull-{up,down} is specified
without
an argument, in which case arg == 1. This does seem to be covered by
falling back to just PU/PD, but it's not exactly obvious, especially
since we are skipping mtk_pinconf_bias_set_pu_pd() just below.

So you actually need to check for the magic values first, and if arg
doesn't match any of them, assume an SI unit argument and try to do
a lookup.
one very important point of upstream is keeping backward compatibility,
since almost all customers of other MTK platforms does not care about
resistor values so we leave user to choose MTK_PULL_SET_RSEL_XXX
without necessity to know resistor value.
Our policy is making most customers/users convenient.
Encourage of using SI unit is not in concern.

For mt8195, we choose "hw->soc->pin_rsel", so it can support SI unit.

quoted
+
+       err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL,
rsel_val);
+       if (err)
+               goto out;
+
+       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
MTK_ENABLE);
+
+out:
+       return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
                                const struct mtk_pin_desc *desc,
                                u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int
mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
This hunk is somewhat whacky. I assume it's because you also fixed up
the indentation for mtk_pinconf_bias_set_combo(). While nice to do,
in this case it actually works against having an easy to read patch.
yes, it's because to fix up
the indentation for mtk_pinconf_bias_set_combo().

quoted
        return err;
 }

-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-                               const struct mtk_pin_desc *desc,
-                               u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 *pullup, u32 *enable)
 {
-       int err;
+       int pu, pd, rsel, err;

-       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL,
&rsel);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup,
arg);
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd);
Maybe this could reuse mtk_pinconf_bias_get_pu_pd(), much like on the
`set`
side?
we will try to reuse mtk_pinconf_bias_get_pu_pd().

quoted
+
+       if (pu == 0 && pd == 0) {
+               *pullup = 0;
+               *enable = MTK_DISABLE;
+       } else if (pu == 1 && pd == 0) {
+               *pullup = 1;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else if (pu == 0 && pd == 1) {
+               *pullup = 0;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else {
+               err = -EINVAL;
+               goto out;
+       }

 out:
        return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+                              const struct mtk_pin_desc *desc,
+                              u32 pullup, u32 arg)
+{
+       int err = -EOPNOTSUPP;
+       bool try_all_type;
+
+       try_all_type = hw->soc->pull_type ? false : true;
Using ternary ops is discouraged. Maybe this could be structured
like:

    u32 pull_type;

    if (hw->soc->pull_type)
            pull_type = hw->soc->pull_type[desc->number];
    else
            pull_type = MTK_PULL_TYPE_MASK;

That way you don't need to test `try_all_type` every time.
we will try to change it in next version.

quoted
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_rsel(hw, desc, pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
+                                                         pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE)) {
+               err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc,
pullup, arg);
+               if (err)
+                       dev_err(hw->dev, "Invalid pull
argument\n");
The "if (err)" could be moved outside the upper "if" block. That way
the code flow looks more consistent, plus we get an error message
regardless of the pull type supported.
we will move "if (err)" outside the upper "if" block in the next
version.
quoted
+       }
+
+       return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);

 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
                              const struct mtk_pin_desc *desc,
                              u32 *pullup, u32 *enable)
 {
-       int err;
+       int err = -EOPNOTSUPP;
+       bool try_all_type;

-       err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
-       if (!err)
-               goto out;
+       try_all_type = hw->soc->pull_type ? false : true;
Same here.
we will try to change it in next version.

quoted
-       err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup,
enable);
-       if (!err)
-               goto out;
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_rsel(hw, desc, pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup,
enable);
+               if (!err)
+                       return err;
+       }

-       err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup,
enable);
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
+                                                         pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE))
+               err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc,
pullup, enable);

-out:
        return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE            BIT(0)
+#define MTK_PULL_PULLSEL_TYPE          BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE                BIT(2)
+#define MTK_PULL_RSEL_TYPE             BIT(3)
+#define MTK_PULL_PU_PD_RSEL_TYPE       (MTK_PULL_PU_PD_TYPE \
+                                       | MTK_PULL_RSEL_TYPE)
MTK_PULL_RSEL_TYPE deserves a comment saying why it should not be
used
on its own.

But since mtk_pinconf_bias_set_rsel() is already calling
mtk_pinconf_bias_set_pu_pd(), if the former function is reworked,
then
the two types don't need to be combined for the fallback behavior.

MTK_PULL_PU_PD_RSEL_TYPE is type wihch is can be control by
MTK_PULL_PU_PD_TYPE or MTK_PULL_RSEL_TYPE. so we combibe them
together.

quoted
 #define EINT_NA        U16_MAX
 #define NO_EINT_SUPPORT        EINT_NA
@@ -42,6 +49,14 @@
        PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs,
_s_bit,    \
                       _x_bits, 32, 1)

+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl,
_down_rsel) {  \
                                                    ^ rsel?

quoted
+               .s_pin =
_s_pin,                                        \
+               .e_pin =
_e_pin,                                        \
+               .rsel_index =
_rsel_index,                              \
+               .up_rsel =
_up_resl,                                    \
+               .down_rsel =
_down_rsel,                                \
+       }
+
 /* List these attributes which could be modified for the pin */
 enum {
        PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };

@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
        u8  fixed;
 };

+/* struct mtk_pin_rsel - the structure that providing bias
resistance selection.
                                               ^ provides
we will change it in next version.


quoted
+ * @s_pin:             the start pin within the rsel range
+ * @e_pin:             the end pin within the rsel range
+ * @rsel_index:        the rsel bias resistance index
+ * @up_rsel:   the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+       u16 s_pin;
+       u16 e_pin;
+       u16 rsel_index;
+       u32 up_rsel;
+       u32 down_rsel;
+};
+
If it were up to me, I would split this into two layers, one for the
register value <-> resistor value mapping, lets call it "rsel table",
and the other for pin <-> "rsel table" mapping.

I assume most if not all pins that support rsel would have the same
set
of resistor values, so that would trade a level of indirection for
better
usage of space.

quoted
 /* struct mtk_pin_reg_calc - the structure that holds all ranges
used to
  *                          determine which register the pin would
make use of
  *                          for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
        bool                            ies_present;
        const char * const              *base_names;
        unsigned int                    nbase_names;
+       const unsigned int              *pull_type;
+       const struct mtk_pin_rsel       *pin_rsel;
+       unsigned int                    npin_rsel;

        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc *desc, u32
arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc *desc, u32
*val);
-
Unrelated whitespace change. Please remove it.
we will remove it in next version.

quoted
        /* Specific driver data */
        void                            *driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct
mtk_pinctrl *hw, unsigned int gpio, int
        mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen)
+       unsigned int gpio, char *buf, unsigned int buf_len)
Unrelated change.
we will sparate it in next version.

quoted
 {
-       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1, rsel
= -1;
        const struct mtk_pin_desc *desc;

        if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pinmux -= hw->soc->nfuncs;

        mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+
+       /* Case for: R1R0 */
        if (pullen == MTK_PUPD_SET_R1R0_00) {
                pullen = 0;
                r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pullen = 1;
                r1 = 1;
                r0 = 1;
-       } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
-               pullen = 0;
        }
-       len += scnprintf(buf + len, bufLen - len,
+
+       /* Case for: RSEL */
+       if (pullen >= MTK_PULL_SET_RSEL_000 &&
+           pullen <= MTK_PULL_SET_RSEL_111) {
+               rsel = pullen - MTK_PULL_SET_RSEL_000;
+               pullen = 1;
+       }
+
+       len += scnprintf(buf + len, buf_len - len,
Unrelated change.
it is used to get rsel debug changes
quoted
                        "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
                        gpio,
                        pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                        pullup);

        if (r1 != -1) {
-               len += scnprintf(buf + len, bufLen - len, " (%1d
%1d)\n",
+               len += scnprintf(buf + len, buf_len - len, " (%1d
%1d)\n",
                        r1, r0);
+       } else if (rsel != -1) {
+               len += scnprintf(buf + len, buf_len - len, "
(%1d)\n", rsel);
        } else {
-               len += scnprintf(buf + len, bufLen - len, "\n");
+               len += scnprintf(buf + len, buf_len - len, "\n");
Unrelated changes.
it is used to get rsel debug changes 

quoted
        }

        return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h
b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct
platform_device *pdev,
                            const struct mtk_pin_soc *soc);

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen);
+       unsigned int gpio, char *buf, unsigned int buf_len);
Unrelated change.
sparate it in next version.

Regards
ChenYu

quoted
 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;

--
2.18.0
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-09-06 10:09:43 
    

  

  
On Mon, Sep 6, 2021 at 11:17 AM zhiyong.tao [off-list ref] wrote:
On Wed, 2021-09-01 at 18:10 +0800, Chen-Yu Tsai wrote:
quoted
Hi,

On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao <zhiyong.tao@mediatek.com
quoted
wrote:

This patch provides rsel setting on MT8195
A bit more context, like what is rsel, would be nice.
we will add more context it in the next version.
quoted
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133 +++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181
++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)
Could you split this patch into two, so the common parts are in the
first
patch, and the mt8195 specific changes are in the second?
ok, we will split in the next version.

quoted
quoted
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc
mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };

+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[] = {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] = {
+       PIN_RSEL(8, 17, 0x0, 75000, 75000),
+       PIN_RSEL(8, 17, 0x1, 10000, 5000),
+       PIN_RSEL(8, 17, 0x2, 5000, 75000),
+       PIN_RSEL(8, 17, 0x3, 4000, 5000),
+       PIN_RSEL(8, 17, 0x4, 3000, 75000),
+       PIN_RSEL(8, 17, 0x5, 2000, 5000),
+       PIN_RSEL(8, 17, 0x6, 1500, 75000),
+       PIN_RSEL(8, 17, 0x7, 1000, 5000),
+       PIN_RSEL(29, 30, 0x0, 75000, 75000),
+       PIN_RSEL(29, 30, 0x1, 10000, 5000),
+       PIN_RSEL(29, 30, 0x2, 5000, 75000),
+       PIN_RSEL(29, 30, 0x3, 4000, 5000),
+       PIN_RSEL(29, 30, 0x4, 3000, 75000),
+       PIN_RSEL(29, 30, 0x5, 2000, 5000),
+       PIN_RSEL(29, 30, 0x6, 1500, 75000),
+       PIN_RSEL(29, 30, 0x7, 1000, 5000),
+       PIN_RSEL(34, 35, 0x0, 75000, 75000),
+       PIN_RSEL(34, 35, 0x1, 10000, 5000),
+       PIN_RSEL(34, 35, 0x2, 5000, 75000),
+       PIN_RSEL(34, 35, 0x3, 4000, 5000),
+       PIN_RSEL(34, 35, 0x4, 3000, 75000),
+       PIN_RSEL(34, 35, 0x5, 2000, 5000),
+       PIN_RSEL(34, 35, 0x6, 1500, 75000),
+       PIN_RSEL(34, 35, 0x7, 1000, 5000),
+       PIN_RSEL(44, 45, 0x0, 75000, 75000),
+       PIN_RSEL(44, 45, 0x1, 10000, 5000),
+       PIN_RSEL(44, 45, 0x2, 5000, 75000),
+       PIN_RSEL(44, 45, 0x3, 4000, 5000),
+       PIN_RSEL(44, 45, 0x4, 3000, 75000),
+       PIN_RSEL(44, 45, 0x5, 2000, 5000),
+       PIN_RSEL(44, 45, 0x6, 1500, 75000),
+       PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+       MTK_PULL_PUPD_R1R0_TYPE /* 0 */, MTK_PULL_PUPD_R1R0_TYPE /*
1 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 2 */, MTK_PULL_PUPD_R1R0_TYPE /*
3 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 4 */, MTK_PULL_PUPD_R1R0_TYPE /*
5 */,
+       MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 8 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 9 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 10 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 11 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 12 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 13 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 14 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 15 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 16 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 17 */,
+       MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19 */,
+       MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21 */,
+       MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23 */,
+       MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25 */,
+       MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27 */,
+       MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE /*
29 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE /*
31 */,
+       MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 34 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 35 */,
+       MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37 */,
+       MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39 */,
+       MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41 */,
+       MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 44 */, MTK_PULL_PU_PD_RSEL_TYPE
/* 45 */,
+       MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47 */,
+       MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49 */,
+       MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51 */,
+       MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53 */,
+       MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55 */,
+       MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57 */,
+       MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59 */,
+       MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61 */,
+       MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63 */,
+       MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65 */,
+       MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67 */,
+       MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69 */,
+       MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71 */,
+       MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73 */,
+       MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75 */,
+       MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE /* 77
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 78 */, MTK_PULL_PUPD_R1R0_TYPE
/* 79 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 80 */, MTK_PULL_PUPD_R1R0_TYPE
/* 81 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 82 */, MTK_PULL_PUPD_R1R0_TYPE
/* 83 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 84 */, MTK_PULL_PUPD_R1R0_TYPE
/* 85 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 86 */, MTK_PULL_PUPD_R1R0_TYPE
/* 87 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 88 */, MTK_PULL_PUPD_R1R0_TYPE
/* 89 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 90 */, MTK_PULL_PUPD_R1R0_TYPE
/* 91 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 92 */, MTK_PULL_PUPD_R1R0_TYPE
/* 93 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 94 */, MTK_PULL_PUPD_R1R0_TYPE
/* 95 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE /* 97
*/,
+       MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99 */,
+       MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /* 101
*/,
+       MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /* 103
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 104 */, MTK_PULL_PUPD_R1R0_TYPE
/* 105 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 106 */, MTK_PULL_PUPD_R1R0_TYPE
/* 107 */,
+       MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /* 109
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 110 */, MTK_PULL_PUPD_R1R0_TYPE
/* 111 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 112 */, MTK_PULL_PUPD_R1R0_TYPE
/* 113 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 114 */, MTK_PULL_PUPD_R1R0_TYPE
/* 115 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 116 */, MTK_PULL_PUPD_R1R0_TYPE
/* 117 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 118 */, MTK_PULL_PUPD_R1R0_TYPE
/* 119 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 120 */, MTK_PULL_PUPD_R1R0_TYPE
/* 121 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 122 */, MTK_PULL_PUPD_R1R0_TYPE
/* 123 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 124 */, MTK_PULL_PUPD_R1R0_TYPE
/* 125 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 126 */, MTK_PULL_PUPD_R1R0_TYPE
/* 127 */,
+       MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /* 129
*/,
+       MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /* 131
*/,
+       MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /* 133
*/,
+       MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /* 135
*/,
+       MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /* 137
*/,
+       MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /* 139
*/,
+       MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /* 141
*/,
+       MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /* 143
*/,
+};
+
 static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] =
MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] = MTK_RANGE(mt8195_pin_rsel_range),
 };

 static const char * const mt8195_pinctrl_register_base_names[] = {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data = {
        .gpio_m = 0,
        .base_names = mt8195_pinctrl_register_base_names,
        .nbase_names =
ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+       .pull_type = mt8195_pull_type,
+       .pin_rsel = mt8195_pin_rsel_val_range,
+       .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
        .bias_set_combo = mtk_pinconf_bias_set_combo,
        .bias_get_combo = mtk_pinconf_bias_get_combo,
        .drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        } else if (arg == MTK_PUPD_SET_R1R0_11) {
                r0 = 1;
                r1 = 1;
+       } else if (arg == MTK_ENABLE) {
+               r0 = 1;
+               r1 = 0;
This change does not seem related. This should be in a separate patch
and why and what this change is should be described in the commit
log.
I assume this is to support "bias-pull-up" or "bias-pull-down"
without
arguments on pins using R1R0?
we will separate it in next version.
some users want only pull up/down, they don't care about the resistance
value. So we support the case which only use "bias-pull-up" or "bias-
pull-down" without arguments on pins using R1R0.
I see. This should be added as a separate patch before the RSEL stuff
then. That way it would also be easier to backport in case it is needed.

quoted
quoted
        } else {
                err = -EINVAL;
                goto out;
@@ -661,6 +664,75 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        return err;
 }

+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+                                 const struct mtk_pin_desc *desc,
+                                 u32 pullup, u32 arg, u32
*rsel_val)
+{
+       const struct mtk_pin_rsel *rsel;
+       int check;
+       bool found = false;
+
+       rsel = hw->soc->pin_rsel;
+
+       for (check = 0; check <= hw->soc->npin_rsel - 1; check++) {
+               if (desc->number >= rsel[check].s_pin &&
+                   desc->number <= rsel[check].e_pin) {
+                       if (pullup) {
+                               if (rsel[check].up_rsel == arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       } else {
+                               if (rsel[check].down_rsel == arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       }
+               }
+       }
+
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d Ohm for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP is not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.
The context surrounding this warning seems to be that ENOTSUPP is hard
for userspace to understand. AFAIK the return code here does not get
passed to userspace? And the pinctrl core does check for EINVAL or
ENOTSUPP, so I think this is a valid use case.

Linus?

quoted
I also think it would make sense to differentiate between the pin not
supporting RSEL (return -ENOTSUPP) vs supporting RSEL but a resistor
value not in the table was requested (return -EINVAL). This might be
easier to do with the two-table design I mentioned.
It only support resistor value on the patch on mt8195. we think we need
only maintain one-table design.
OK. I think there's a possibility that some corner case might happen.
I guess we'll deal with them if they occur.

quoted
quoted
+       }
+
+       return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 pullup, u32 arg)
+{
+       int err, rsel_val;
+
+       if (hw->soc->pin_rsel) {
+               /* find pin rsel_index from pin_rsel array*/
+               err = mtk_hw_pin_rsel_lookup(hw, desc, pullup, arg,
&rsel_val);
+               if (err)
+                       goto out;
+       } else {
+               if (arg < MTK_PULL_SET_RSEL_000 ||
+                   arg > MTK_PULL_SET_RSEL_111) {
+                       err = -EINVAL;
+                       goto out;
+               }
+
+               rsel_val -= MTK_PULL_SET_RSEL_000;
+       }
This is not structured correctly. Think about this: on a chip, say
MT8195,
which has hw->soc->pin_rsel defined, but the device tree writer chose
to use the macros instead of SI unit values. This is exactly the
scenario
you discussed privately with me.

This also fails the case where bias-pull-{up,down} is specified
without
an argument, in which case arg == 1. This does seem to be covered by
falling back to just PU/PD, but it's not exactly obvious, especially
since we are skipping mtk_pinconf_bias_set_pu_pd() just below.

So you actually need to check for the magic values first, and if arg
doesn't match any of them, assume an SI unit argument and try to do
a lookup.
one very important point of upstream is keeping backward compatibility,
since almost all customers of other MTK platforms does not care about
resistor values so we leave user to choose MTK_PULL_SET_RSEL_XXX
without necessity to know resistor value.
I'm not sure about the connection to backward compatibility here, given
that you are just introducing support for RSEL.

Our policy is making most customers/users convenient.
Encourage of using SI unit is not in concern.

For mt8195, we choose "hw->soc->pin_rsel", so it can support SI unit.
Regarding my concern, there are a lot of moving pieces here, so let's see
how the next revision turns out and if this is still an issue.

quoted
quoted
+
+       err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL,
rsel_val);
+       if (err)
+               goto out;
+
+       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
MTK_ENABLE);
+
+out:
+       return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
                                const struct mtk_pin_desc *desc,
                                u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int
mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
This hunk is somewhat whacky. I assume it's because you also fixed up
the indentation for mtk_pinconf_bias_set_combo(). While nice to do,
in this case it actually works against having an easy to read patch.
yes, it's because to fix up
the indentation for mtk_pinconf_bias_set_combo().
I suggest moving that to a separate patch. While whitespace changes are
sometimes frowned upon, I think this is OK given that it would improve
readability of the patches following it. You should mention that in the
commit message to justify the change.

quoted
quoted
        return err;
 }

-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-                               const struct mtk_pin_desc *desc,
-                               u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 *pullup, u32 *enable)
 {
-       int err;
+       int pu, pd, rsel, err;

-       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup, arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL,
&rsel);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc, pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU, &pu);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup,
arg);
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD, &pd);
Maybe this could reuse mtk_pinconf_bias_get_pu_pd(), much like on the
`set`
side?
we will try to reuse mtk_pinconf_bias_get_pu_pd().

quoted
quoted
+
+       if (pu == 0 && pd == 0) {
+               *pullup = 0;
+               *enable = MTK_DISABLE;
+       } else if (pu == 1 && pd == 0) {
+               *pullup = 1;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else if (pu == 0 && pd == 1) {
+               *pullup = 0;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else {
+               err = -EINVAL;
+               goto out;
+       }

 out:
        return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+                              const struct mtk_pin_desc *desc,
+                              u32 pullup, u32 arg)
+{
+       int err = -EOPNOTSUPP;
+       bool try_all_type;
+
+       try_all_type = hw->soc->pull_type ? false : true;
Using ternary ops is discouraged. Maybe this could be structured
like:

    u32 pull_type;

    if (hw->soc->pull_type)
            pull_type = hw->soc->pull_type[desc->number];
    else
            pull_type = MTK_PULL_TYPE_MASK;

That way you don't need to test `try_all_type` every time.
we will try to change it in next version.

quoted
quoted
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_rsel(hw, desc, pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
+                                                         pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE)) {
+               err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc,
pullup, arg);
+               if (err)
+                       dev_err(hw->dev, "Invalid pull
argument\n");
The "if (err)" could be moved outside the upper "if" block. That way
the code flow looks more consistent, plus we get an error message
regardless of the pull type supported.
we will move "if (err)" outside the upper "if" block in the next
version.
quoted
quoted
+       }
+
+       return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);

 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
                              const struct mtk_pin_desc *desc,
                              u32 *pullup, u32 *enable)
 {
-       int err;
+       int err = -EOPNOTSUPP;
+       bool try_all_type;

-       err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup, enable);
-       if (!err)
-               goto out;
+       try_all_type = hw->soc->pull_type ? false : true;
Same here.
we will try to change it in next version.

quoted
quoted
-       err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc, pullup,
enable);
-       if (!err)
-               goto out;
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_rsel(hw, desc, pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup,
enable);
+               if (!err)
+                       return err;
+       }

-       err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup,
enable);
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
+                                                         pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE))
+               err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc,
pullup, enable);

-out:
        return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE            BIT(0)
+#define MTK_PULL_PULLSEL_TYPE          BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE                BIT(2)
+#define MTK_PULL_RSEL_TYPE             BIT(3)
+#define MTK_PULL_PU_PD_RSEL_TYPE       (MTK_PULL_PU_PD_TYPE \
+                                       | MTK_PULL_RSEL_TYPE)
MTK_PULL_RSEL_TYPE deserves a comment saying why it should not be
used
on its own.

But since mtk_pinconf_bias_set_rsel() is already calling
mtk_pinconf_bias_set_pu_pd(), if the former function is reworked,
then
the two types don't need to be combined for the fallback behavior.

MTK_PULL_PU_PD_RSEL_TYPE is type wihch is can be control by
MTK_PULL_PU_PD_TYPE or MTK_PULL_RSEL_TYPE. so we combibe them
together.
But can RSEL be used without PU/PD? The definitions read like "PU_PD_RSEL"
means either RSEL or PU/PD can be used, but if I understand the hardware
correctly, RSEL by itself only selects the resistor value, but doesn't
turn on/off the bias nor select pull up or down. So RSEL is an extension
of PU/PD, and by itself won't have any real effect.

Since this could be interpreted either way, a comment explaining things
should be added to document the author's intentions.

quoted
quoted
 #define EINT_NA        U16_MAX
 #define NO_EINT_SUPPORT        EINT_NA
@@ -42,6 +49,14 @@
        PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs,
_s_bit,    \
                       _x_bits, 32, 1)

+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl,
_down_rsel) {  \
                                                    ^ rsel?

quoted
+               .s_pin =
_s_pin,                                        \
+               .e_pin =
_e_pin,                                        \
+               .rsel_index =
_rsel_index,                              \
+               .up_rsel =
_up_resl,                                    \
+               .down_rsel =
_down_rsel,                                \
+       }
+
 /* List these attributes which could be modified for the pin */
 enum {
        PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };

@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
        u8  fixed;
 };

+/* struct mtk_pin_rsel - the structure that providing bias
resistance selection.
                                               ^ provides
we will change it in next version.


quoted
quoted
+ * @s_pin:             the start pin within the rsel range
+ * @e_pin:             the end pin within the rsel range
+ * @rsel_index:        the rsel bias resistance index
+ * @up_rsel:   the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+       u16 s_pin;
+       u16 e_pin;
+       u16 rsel_index;
+       u32 up_rsel;
+       u32 down_rsel;
+};
+
If it were up to me, I would split this into two layers, one for the
register value <-> resistor value mapping, lets call it "rsel table",
and the other for pin <-> "rsel table" mapping.

I assume most if not all pins that support rsel would have the same
set
of resistor values, so that would trade a level of indirection for
better
usage of space.

quoted
 /* struct mtk_pin_reg_calc - the structure that holds all ranges
used to
  *                          determine which register the pin would
make use of
  *                          for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
        bool                            ies_present;
        const char * const              *base_names;
        unsigned int                    nbase_names;
+       const unsigned int              *pull_type;
+       const struct mtk_pin_rsel       *pin_rsel;
+       unsigned int                    npin_rsel;

        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc *desc, u32
arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc *desc, u32
*val);
-
Unrelated whitespace change. Please remove it.
we will remove it in next version.

quoted
quoted
        /* Specific driver data */
        void                            *driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct
mtk_pinctrl *hw, unsigned int gpio, int
        mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen)
+       unsigned int gpio, char *buf, unsigned int buf_len)
Unrelated change.
we will sparate it in next version.

quoted
quoted
 {
-       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1, rsel
= -1;
        const struct mtk_pin_desc *desc;

        if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pinmux -= hw->soc->nfuncs;

        mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+
+       /* Case for: R1R0 */
        if (pullen == MTK_PUPD_SET_R1R0_00) {
                pullen = 0;
                r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pullen = 1;
                r1 = 1;
                r0 = 1;
-       } else if (pullen != MTK_DISABLE && pullen != MTK_ENABLE) {
-               pullen = 0;
        }
-       len += scnprintf(buf + len, bufLen - len,
+
+       /* Case for: RSEL */
+       if (pullen >= MTK_PULL_SET_RSEL_000 &&
+           pullen <= MTK_PULL_SET_RSEL_111) {
+               rsel = pullen - MTK_PULL_SET_RSEL_000;
+               pullen = 1;
+       }
+
+       len += scnprintf(buf + len, buf_len - len,
Unrelated change.
it is used to get rsel debug changes
quoted
quoted
                        "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
                        gpio,
                        pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                        pullup);

        if (r1 != -1) {
-               len += scnprintf(buf + len, bufLen - len, " (%1d
%1d)\n",
+               len += scnprintf(buf + len, buf_len - len, " (%1d
%1d)\n",
                        r1, r0);
+       } else if (rsel != -1) {
+               len += scnprintf(buf + len, buf_len - len, "
(%1d)\n", rsel);
        } else {
-               len += scnprintf(buf + len, bufLen - len, "\n");
+               len += scnprintf(buf + len, buf_len - len, "\n");
Unrelated changes.
it is used to get rsel debug changes
Sorry about the confusion. The unrelated change I meant to point out
is actually just the "bufLen" to "buf_len" change.


Regards
ChenYu




quoted
quoted
        }

        return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h
b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct
platform_device *pdev,
                            const struct mtk_pin_soc *soc);

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen);
+       unsigned int gpio, char *buf, unsigned int buf_len);
Unrelated change.
sparate it in next version.

quoted
Regards
ChenYu

quoted
 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;

--
2.18.0
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-09 07:48:46 
    

  

  
On Mon, 2021-09-06 at 18:09 +0800, Chen-Yu Tsai wrote:
On Mon, Sep 6, 2021 at 11:17 AM zhiyong.tao <zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 18:10 +0800, Chen-Yu Tsai wrote:
quoted
Hi,

On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao <
zhiyong.tao@mediatek.com
quoted
wrote:

This patch provides rsel setting on MT8195
A bit more context, like what is rsel, would be nice.
we will add more context it in the next version.
quoted
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133
+++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181
++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)
Could you split this patch into two, so the common parts are in
the
first
patch, and the mt8195 specific changes are in the second?
ok, we will split in the next version.

quoted
quoted
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc
mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };

+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[]
= {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] =
{
+       PIN_RSEL(8, 17, 0x0, 75000, 75000),
+       PIN_RSEL(8, 17, 0x1, 10000, 5000),
+       PIN_RSEL(8, 17, 0x2, 5000, 75000),
+       PIN_RSEL(8, 17, 0x3, 4000, 5000),
+       PIN_RSEL(8, 17, 0x4, 3000, 75000),
+       PIN_RSEL(8, 17, 0x5, 2000, 5000),
+       PIN_RSEL(8, 17, 0x6, 1500, 75000),
+       PIN_RSEL(8, 17, 0x7, 1000, 5000),
+       PIN_RSEL(29, 30, 0x0, 75000, 75000),
+       PIN_RSEL(29, 30, 0x1, 10000, 5000),
+       PIN_RSEL(29, 30, 0x2, 5000, 75000),
+       PIN_RSEL(29, 30, 0x3, 4000, 5000),
+       PIN_RSEL(29, 30, 0x4, 3000, 75000),
+       PIN_RSEL(29, 30, 0x5, 2000, 5000),
+       PIN_RSEL(29, 30, 0x6, 1500, 75000),
+       PIN_RSEL(29, 30, 0x7, 1000, 5000),
+       PIN_RSEL(34, 35, 0x0, 75000, 75000),
+       PIN_RSEL(34, 35, 0x1, 10000, 5000),
+       PIN_RSEL(34, 35, 0x2, 5000, 75000),
+       PIN_RSEL(34, 35, 0x3, 4000, 5000),
+       PIN_RSEL(34, 35, 0x4, 3000, 75000),
+       PIN_RSEL(34, 35, 0x5, 2000, 5000),
+       PIN_RSEL(34, 35, 0x6, 1500, 75000),
+       PIN_RSEL(34, 35, 0x7, 1000, 5000),
+       PIN_RSEL(44, 45, 0x0, 75000, 75000),
+       PIN_RSEL(44, 45, 0x1, 10000, 5000),
+       PIN_RSEL(44, 45, 0x2, 5000, 75000),
+       PIN_RSEL(44, 45, 0x3, 4000, 5000),
+       PIN_RSEL(44, 45, 0x4, 3000, 75000),
+       PIN_RSEL(44, 45, 0x5, 2000, 5000),
+       PIN_RSEL(44, 45, 0x6, 1500, 75000),
+       PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+       MTK_PULL_PUPD_R1R0_TYPE /* 0 */,
MTK_PULL_PUPD_R1R0_TYPE /*
1 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 2 */,
MTK_PULL_PUPD_R1R0_TYPE /*
3 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 4 */,
MTK_PULL_PUPD_R1R0_TYPE /*
5 */,
+       MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 8 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 9 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 10 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 11 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 12 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 13 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 14 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 15 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 16 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 17 */,
+       MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19
*/,
+       MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21
*/,
+       MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23
*/,
+       MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25
*/,
+       MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27
*/,
+       MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE
/*
29 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE
/*
31 */,
+       MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 34 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 35 */,
+       MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37
*/,
+       MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39
*/,
+       MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41
*/,
+       MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 44 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 45 */,
+       MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47
*/,
+       MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49
*/,
+       MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51
*/,
+       MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53
*/,
+       MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55
*/,
+       MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57
*/,
+       MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59
*/,
+       MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61
*/,
+       MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63
*/,
+       MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65
*/,
+       MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67
*/,
+       MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69
*/,
+       MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71
*/,
+       MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73
*/,
+       MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75
*/,
+       MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE
/* 77
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 78 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 79 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 80 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 81 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 82 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 83 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 84 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 85 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 86 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 87 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 88 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 89 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 90 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 91 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 92 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 93 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 94 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 95 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE
/* 97
*/,
+       MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99
*/,
+       MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /*
101
*/,
+       MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /*
103
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 104 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 105 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 106 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 107 */,
+       MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /*
109
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 110 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 111 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 112 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 113 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 114 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 115 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 116 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 117 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 118 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 119 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 120 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 121 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 122 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 123 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 124 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 125 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 126 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 127 */,
+       MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /*
129
*/,
+       MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /*
131
*/,
+       MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /*
133
*/,
+       MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /*
135
*/,
+       MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /*
137
*/,
+       MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /*
139
*/,
+       MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /*
141
*/,
+       MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /*
143
*/,
+};
+
 static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] =
MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] =
MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] =
MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] =
MTK_RANGE(mt8195_pin_rsel_range),
 };

 static const char * const mt8195_pinctrl_register_base_names[]
= {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data
= {
        .gpio_m = 0,
        .base_names = mt8195_pinctrl_register_base_names,
        .nbase_names =
ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+       .pull_type = mt8195_pull_type,
+       .pin_rsel = mt8195_pin_rsel_val_range,
+       .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
        .bias_set_combo = mtk_pinconf_bias_set_combo,
        .bias_get_combo = mtk_pinconf_bias_get_combo,
        .drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        } else if (arg == MTK_PUPD_SET_R1R0_11) {
                r0 = 1;
                r1 = 1;
+       } else if (arg == MTK_ENABLE) {
+               r0 = 1;
+               r1 = 0;
This change does not seem related. This should be in a separate
patch
and why and what this change is should be described in the commit
log.
I assume this is to support "bias-pull-up" or "bias-pull-down"
without
arguments on pins using R1R0?
we will separate it in next version.
some users want only pull up/down, they don't care about the
resistance
value. So we support the case which only use "bias-pull-up" or
"bias-
pull-down" without arguments on pins using R1R0.
I see. This should be added as a separate patch before the RSEL stuff
then. That way it would also be easier to backport in case it is
needed.
ok, we will split in the next version.


quoted
quoted
quoted
        } else {
                err = -EINVAL;
                goto out;
@@ -661,6 +664,75 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        return err;
 }

+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+                                 const struct mtk_pin_desc
*desc,
+                                 u32 pullup, u32 arg, u32
*rsel_val)
+{
+       const struct mtk_pin_rsel *rsel;
+       int check;
+       bool found = false;
+
+       rsel = hw->soc->pin_rsel;
+
+       for (check = 0; check <= hw->soc->npin_rsel - 1;
check++) {
+               if (desc->number >= rsel[check].s_pin &&
+                   desc->number <= rsel[check].e_pin) {
+                       if (pullup) {
+                               if (rsel[check].up_rsel == arg)
{
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       } else {
+                               if (rsel[check].down_rsel ==
arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       }
+               }
+       }
+
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d Ohm
for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be
network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP is
not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.
The context surrounding this warning seems to be that ENOTSUPP is
hard
for userspace to understand. AFAIK the return code here does not get
passed to userspace? And the pinctrl core does check for EINVAL or
ENOTSUPP, so I think this is a valid use case.

Linus?

quoted
quoted
I also think it would make sense to differentiate between the pin
not
supporting RSEL (return -ENOTSUPP) vs supporting RSEL but a
resistor
value not in the table was requested (return -EINVAL). This might
be
easier to do with the two-table design I mentioned.
It only support resistor value on the patch on mt8195. we think we
need
only maintain one-table design.
OK. I think there's a possibility that some corner case might happen.
I guess we'll deal with them if they occur.

quoted
quoted
quoted
+       }
+
+       return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 pullup, u32 arg)
+{
+       int err, rsel_val;
+
+       if (hw->soc->pin_rsel) {
+               /* find pin rsel_index from pin_rsel array*/
+               err = mtk_hw_pin_rsel_lookup(hw, desc, pullup,
arg,
&rsel_val);
+               if (err)
+                       goto out;
+       } else {
+               if (arg < MTK_PULL_SET_RSEL_000 ||
+                   arg > MTK_PULL_SET_RSEL_111) {
+                       err = -EINVAL;
+                       goto out;
+               }
+
+               rsel_val -= MTK_PULL_SET_RSEL_000;
+       }
This is not structured correctly. Think about this: on a chip,
say
MT8195,
which has hw->soc->pin_rsel defined, but the device tree writer
chose
to use the macros instead of SI unit values. This is exactly the
scenario
you discussed privately with me.

This also fails the case where bias-pull-{up,down} is specified
without
an argument, in which case arg == 1. This does seem to be covered
by
falling back to just PU/PD, but it's not exactly obvious,
especially
since we are skipping mtk_pinconf_bias_set_pu_pd() just below.

So you actually need to check for the magic values first, and if
arg
doesn't match any of them, assume an SI unit argument and try to
do
a lookup.
one very important point of upstream is keeping backward
compatibility,
since almost all customers of other MTK platforms does not care
about
resistor values so we leave user to choose MTK_PULL_SET_RSEL_XXX
without necessity to know resistor value.
I'm not sure about the connection to backward compatibility here,
given
that you are just introducing support for RSEL.

quoted
Our policy is making most customers/users convenient.
Encourage of using SI unit is not in concern.

For mt8195, we choose "hw->soc->pin_rsel", so it can support SI
unit.
Regarding my concern, there are a lot of moving pieces here, so let's
see
how the next revision turns out and if this is still an issue.

quoted
quoted
quoted
+
+       err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL,
rsel_val);
+       if (err)
+               goto out;
+
+       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
MTK_ENABLE);
+
+out:
+       return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
                                const struct mtk_pin_desc
*desc,
                                u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int
mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
This hunk is somewhat whacky. I assume it's because you also
fixed up
the indentation for mtk_pinconf_bias_set_combo(). While nice to
do,
in this case it actually works against having an easy to read
patch.
yes, it's because to fix up
the indentation for mtk_pinconf_bias_set_combo().
I suggest moving that to a separate patch. While whitespace changes
are
sometimes frowned upon, I think this is OK given that it would
improve
readability of the patches following it. You should mention that in
the
commit message to justify the change.
ok, we will split in the next version.


quoted
quoted
quoted
        return err;
 }

-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-                               const struct mtk_pin_desc
*desc,
-                               u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 *pullup, u32 *enable)
 {
-       int err;
+       int pu, pd, rsel, err;

-       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL,
&rsel);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU,
&pu);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup,
arg);
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD,
&pd);
Maybe this could reuse mtk_pinconf_bias_get_pu_pd(), much like on
the
`set`
side?
we will try to reuse mtk_pinconf_bias_get_pu_pd().

quoted
quoted
+
+       if (pu == 0 && pd == 0) {
+               *pullup = 0;
+               *enable = MTK_DISABLE;
+       } else if (pu == 1 && pd == 0) {
+               *pullup = 1;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else if (pu == 0 && pd == 1) {
+               *pullup = 0;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else {
+               err = -EINVAL;
+               goto out;
+       }

 out:
        return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+                              const struct mtk_pin_desc *desc,
+                              u32 pullup, u32 arg)
+{
+       int err = -EOPNOTSUPP;
+       bool try_all_type;
+
+       try_all_type = hw->soc->pull_type ? false : true;
Using ternary ops is discouraged. Maybe this could be structured
like:

    u32 pull_type;

    if (hw->soc->pull_type)
            pull_type = hw->soc->pull_type[desc->number];
    else
            pull_type = MTK_PULL_TYPE_MASK;

That way you don't need to test `try_all_type` every time.
we will try to change it in next version.

quoted
quoted
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_rsel(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_set_pu_pd(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_pullsel_pullen(hw,
desc,
+                                                         pullu
p,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE)) {
+               err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc,
pullup, arg);
+               if (err)
+                       dev_err(hw->dev, "Invalid pull
argument\n");
The "if (err)" could be moved outside the upper "if" block. That
way
the code flow looks more consistent, plus we get an error message
regardless of the pull type supported.
we will move "if (err)" outside the upper "if" block in the next
version.
quoted
quoted
+       }
+
+       return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);

 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
                              const struct mtk_pin_desc *desc,
                              u32 *pullup, u32 *enable)
 {
-       int err;
+       int err = -EOPNOTSUPP;
+       bool try_all_type;

-       err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup,
enable);
-       if (!err)
-               goto out;
+       try_all_type = hw->soc->pull_type ? false : true;
Same here.
we will try to change it in next version.

quoted
quoted
-       err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
pullup,
enable);
-       if (!err)
-               goto out;
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_rsel(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_get_pu_pd(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }

-       err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup,
enable);
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_pullsel_pullen(hw,
desc,
+                                                         pullu
p,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE))
+               err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc,
pullup, enable);

-out:
        return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE            BIT(0)
+#define MTK_PULL_PULLSEL_TYPE          BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE                BIT(2)
+#define MTK_PULL_RSEL_TYPE             BIT(3)
+#define MTK_PULL_PU_PD_RSEL_TYPE       (MTK_PULL_PU_PD_TYPE \
+                                       | MTK_PULL_RSEL_TYPE)
MTK_PULL_RSEL_TYPE deserves a comment saying why it should not be
used
on its own.

But since mtk_pinconf_bias_set_rsel() is already calling
mtk_pinconf_bias_set_pu_pd(), if the former function is reworked,
then
the two types don't need to be combined for the fallback
behavior.

MTK_PULL_PU_PD_RSEL_TYPE is type wihch is can be control by
MTK_PULL_PU_PD_TYPE or MTK_PULL_RSEL_TYPE. so we combibe them
together.
But can RSEL be used without PU/PD? The definitions read like
"PU_PD_RSEL"
means either RSEL or PU/PD can be used, but if I understand the
hardware
correctly, RSEL by itself only selects the resistor value, but
doesn't
turn on/off the bias nor select pull up or down. So RSEL is an
extension
of PU/PD, and by itself won't have any real effect.
yes, it can select the resister value and can be turn on/off itself.
But it can't select pull up/down.

Since this could be interpreted either way, a comment explaining
things
should be added to document the author's intentions.
We will add a comment explaining it here.

quoted
quoted
quoted
 #define EINT_NA        U16_MAX
 #define NO_EINT_SUPPORT        EINT_NA
@@ -42,6 +49,14 @@
        PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs,
_s_bit,    \
                       _x_bits, 32, 1)

+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl,
_down_rsel) {  \
                                                    ^ rsel?

quoted
+               .s_pin =
_s_pin,                                        \
+               .e_pin =
_e_pin,                                        \
+               .rsel_index =
_rsel_index,                              \
+               .up_rsel =
_up_resl,                                    \
+               .down_rsel =
_down_rsel,                                \
+       }
+
 /* List these attributes which could be modified for the pin
*/
 enum {
        PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };

@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
        u8  fixed;
 };

+/* struct mtk_pin_rsel - the structure that providing bias
resistance selection.
                                               ^ provides
we will change it in next version.


quoted
quoted
+ * @s_pin:             the start pin within the rsel range
+ * @e_pin:             the end pin within the rsel range
+ * @rsel_index:        the rsel bias resistance index
+ * @up_rsel:   the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+       u16 s_pin;
+       u16 e_pin;
+       u16 rsel_index;
+       u32 up_rsel;
+       u32 down_rsel;
+};
+
If it were up to me, I would split this into two layers, one for
the
register value <-> resistor value mapping, lets call it "rsel
table",
and the other for pin <-> "rsel table" mapping.

I assume most if not all pins that support rsel would have the
same
set
of resistor values, so that would trade a level of indirection
for
better
usage of space.

quoted
 /* struct mtk_pin_reg_calc - the structure that holds all
ranges
used to
  *                          determine which register the pin
would
make use of
  *                          for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
        bool                            ies_present;
        const char * const              *base_names;
        unsigned int                    nbase_names;
+       const unsigned int              *pull_type;
+       const struct mtk_pin_rsel       *pin_rsel;
+       unsigned int                    npin_rsel;

        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc *desc,
u32
arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc *desc,
u32
*val);
-
Unrelated whitespace change. Please remove it.
we will remove it in next version.

quoted
quoted
        /* Specific driver data */
        void                            *driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct
mtk_pinctrl *hw, unsigned int gpio, int
        mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen)
+       unsigned int gpio, char *buf, unsigned int buf_len)
Unrelated change.
we will sparate it in next version.

quoted
quoted
 {
-       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1,
rsel
= -1;
        const struct mtk_pin_desc *desc;

        if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pinmux -= hw->soc->nfuncs;

        mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+
+       /* Case for: R1R0 */
        if (pullen == MTK_PUPD_SET_R1R0_00) {
                pullen = 0;
                r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pullen = 1;
                r1 = 1;
                r0 = 1;
-       } else if (pullen != MTK_DISABLE && pullen !=
MTK_ENABLE) {
-               pullen = 0;
        }
-       len += scnprintf(buf + len, bufLen - len,
+
+       /* Case for: RSEL */
+       if (pullen >= MTK_PULL_SET_RSEL_000 &&
+           pullen <= MTK_PULL_SET_RSEL_111) {
+               rsel = pullen - MTK_PULL_SET_RSEL_000;
+               pullen = 1;
+       }
+
+       len += scnprintf(buf + len, buf_len - len,
Unrelated change.
it is used to get rsel debug changes
quoted
quoted
                        "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
                        gpio,
                        pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                        pullup);

        if (r1 != -1) {
-               len += scnprintf(buf + len, bufLen - len, "
(%1d
%1d)\n",
+               len += scnprintf(buf + len, buf_len - len, "
(%1d
%1d)\n",
                        r1, r0);
+       } else if (rsel != -1) {
+               len += scnprintf(buf + len, buf_len - len, "
(%1d)\n", rsel);
        } else {
-               len += scnprintf(buf + len, bufLen - len,
"\n");
+               len += scnprintf(buf + len, buf_len - len,
"\n");
Unrelated changes.
it is used to get rsel debug changes
Sorry about the confusion. The unrelated change I meant to point out
is actually just the "bufLen" to "buf_len" change.


Regards
ChenYu
Ok, I understand, we will separate it.




quoted
quoted
quoted
        }

        return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h
b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct
platform_device *pdev,
                            const struct mtk_pin_soc *soc);

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen);
+       unsigned int gpio, char *buf, unsigned int buf_len);
Unrelated change.
sparate it in next version.

quoted
Regards
ChenYu

quoted
 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;

--
2.18.0
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-16 09:40:14 
    

  

  
On Mon, 2021-09-06 at 18:09 +0800, Chen-Yu Tsai wrote:
On Mon, Sep 6, 2021 at 11:17 AM zhiyong.tao <zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 18:10 +0800, Chen-Yu Tsai wrote:
quoted
Hi,

On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao <
zhiyong.tao@mediatek.com
quoted
wrote:

This patch provides rsel setting on MT8195
A bit more context, like what is rsel, would be nice.
we will add more context it in the next version.
quoted
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133
+++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181
++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)
Could you split this patch into two, so the common parts are in
the
first
patch, and the mt8195 specific changes are in the second?
ok, we will split in the next version.
Hi Chen-Yu,

the common parts and the mt8195 specific changes are a new rsel
feature. Is it suitable to separate them?

Thanks.

quoted
quoted
quoted
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc
mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };

+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[]
= {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] =
{
+       PIN_RSEL(8, 17, 0x0, 75000, 75000),
+       PIN_RSEL(8, 17, 0x1, 10000, 5000),
+       PIN_RSEL(8, 17, 0x2, 5000, 75000),
+       PIN_RSEL(8, 17, 0x3, 4000, 5000),
+       PIN_RSEL(8, 17, 0x4, 3000, 75000),
+       PIN_RSEL(8, 17, 0x5, 2000, 5000),
+       PIN_RSEL(8, 17, 0x6, 1500, 75000),
+       PIN_RSEL(8, 17, 0x7, 1000, 5000),
+       PIN_RSEL(29, 30, 0x0, 75000, 75000),
+       PIN_RSEL(29, 30, 0x1, 10000, 5000),
+       PIN_RSEL(29, 30, 0x2, 5000, 75000),
+       PIN_RSEL(29, 30, 0x3, 4000, 5000),
+       PIN_RSEL(29, 30, 0x4, 3000, 75000),
+       PIN_RSEL(29, 30, 0x5, 2000, 5000),
+       PIN_RSEL(29, 30, 0x6, 1500, 75000),
+       PIN_RSEL(29, 30, 0x7, 1000, 5000),
+       PIN_RSEL(34, 35, 0x0, 75000, 75000),
+       PIN_RSEL(34, 35, 0x1, 10000, 5000),
+       PIN_RSEL(34, 35, 0x2, 5000, 75000),
+       PIN_RSEL(34, 35, 0x3, 4000, 5000),
+       PIN_RSEL(34, 35, 0x4, 3000, 75000),
+       PIN_RSEL(34, 35, 0x5, 2000, 5000),
+       PIN_RSEL(34, 35, 0x6, 1500, 75000),
+       PIN_RSEL(34, 35, 0x7, 1000, 5000),
+       PIN_RSEL(44, 45, 0x0, 75000, 75000),
+       PIN_RSEL(44, 45, 0x1, 10000, 5000),
+       PIN_RSEL(44, 45, 0x2, 5000, 75000),
+       PIN_RSEL(44, 45, 0x3, 4000, 5000),
+       PIN_RSEL(44, 45, 0x4, 3000, 75000),
+       PIN_RSEL(44, 45, 0x5, 2000, 5000),
+       PIN_RSEL(44, 45, 0x6, 1500, 75000),
+       PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+       MTK_PULL_PUPD_R1R0_TYPE /* 0 */,
MTK_PULL_PUPD_R1R0_TYPE /*
1 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 2 */,
MTK_PULL_PUPD_R1R0_TYPE /*
3 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 4 */,
MTK_PULL_PUPD_R1R0_TYPE /*
5 */,
+       MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 8 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 9 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 10 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 11 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 12 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 13 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 14 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 15 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 16 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 17 */,
+       MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19
*/,
+       MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21
*/,
+       MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23
*/,
+       MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25
*/,
+       MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27
*/,
+       MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE
/*
29 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE
/*
31 */,
+       MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 34 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 35 */,
+       MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37
*/,
+       MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39
*/,
+       MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41
*/,
+       MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 44 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 45 */,
+       MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47
*/,
+       MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49
*/,
+       MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51
*/,
+       MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53
*/,
+       MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55
*/,
+       MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57
*/,
+       MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59
*/,
+       MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61
*/,
+       MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63
*/,
+       MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65
*/,
+       MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67
*/,
+       MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69
*/,
+       MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71
*/,
+       MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73
*/,
+       MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75
*/,
+       MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE
/* 77
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 78 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 79 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 80 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 81 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 82 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 83 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 84 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 85 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 86 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 87 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 88 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 89 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 90 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 91 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 92 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 93 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 94 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 95 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE
/* 97
*/,
+       MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99
*/,
+       MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /*
101
*/,
+       MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /*
103
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 104 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 105 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 106 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 107 */,
+       MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /*
109
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 110 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 111 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 112 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 113 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 114 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 115 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 116 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 117 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 118 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 119 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 120 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 121 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 122 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 123 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 124 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 125 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 126 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 127 */,
+       MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /*
129
*/,
+       MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /*
131
*/,
+       MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /*
133
*/,
+       MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /*
135
*/,
+       MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /*
137
*/,
+       MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /*
139
*/,
+       MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /*
141
*/,
+       MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /*
143
*/,
+};
+
 static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] =
MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] =
MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] =
MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] =
MTK_RANGE(mt8195_pin_rsel_range),
 };

 static const char * const mt8195_pinctrl_register_base_names[]
= {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data
= {
        .gpio_m = 0,
        .base_names = mt8195_pinctrl_register_base_names,
        .nbase_names =
ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+       .pull_type = mt8195_pull_type,
+       .pin_rsel = mt8195_pin_rsel_val_range,
+       .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
        .bias_set_combo = mtk_pinconf_bias_set_combo,
        .bias_get_combo = mtk_pinconf_bias_get_combo,
        .drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        } else if (arg == MTK_PUPD_SET_R1R0_11) {
                r0 = 1;
                r1 = 1;
+       } else if (arg == MTK_ENABLE) {
+               r0 = 1;
+               r1 = 0;
This change does not seem related. This should be in a separate
patch
and why and what this change is should be described in the commit
log.
I assume this is to support "bias-pull-up" or "bias-pull-down"
without
arguments on pins using R1R0?
we will separate it in next version.
some users want only pull up/down, they don't care about the
resistance
value. So we support the case which only use "bias-pull-up" or
"bias-
pull-down" without arguments on pins using R1R0.
I see. This should be added as a separate patch before the RSEL stuff
then. That way it would also be easier to backport in case it is
needed.

quoted
quoted
quoted
        } else {
                err = -EINVAL;
                goto out;
@@ -661,6 +664,75 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        return err;
 }

+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+                                 const struct mtk_pin_desc
*desc,
+                                 u32 pullup, u32 arg, u32
*rsel_val)
+{
+       const struct mtk_pin_rsel *rsel;
+       int check;
+       bool found = false;
+
+       rsel = hw->soc->pin_rsel;
+
+       for (check = 0; check <= hw->soc->npin_rsel - 1;
check++) {
+               if (desc->number >= rsel[check].s_pin &&
+                   desc->number <= rsel[check].e_pin) {
+                       if (pullup) {
+                               if (rsel[check].up_rsel == arg)
{
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       } else {
+                               if (rsel[check].down_rsel ==
arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       }
+               }
+       }
+
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d Ohm
for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be
network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP is
not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.
The context surrounding this warning seems to be that ENOTSUPP is
hard
for userspace to understand. AFAIK the return code here does not get
passed to userspace? And the pinctrl core does check for EINVAL or
ENOTSUPP, so I think this is a valid use case.

Linus?
Hi Linus,

Do you have some suggestion for the warning issue?

Thanks

quoted
quoted
I also think it would make sense to differentiate between the pin
not
supporting RSEL (return -ENOTSUPP) vs supporting RSEL but a
resistor
value not in the table was requested (return -EINVAL). This might
be
easier to do with the two-table design I mentioned.
It only support resistor value on the patch on mt8195. we think we
need
only maintain one-table design.
OK. I think there's a possibility that some corner case might happen.
I guess we'll deal with them if they occur.

quoted
quoted
quoted
+       }
+
+       return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 pullup, u32 arg)
+{
+       int err, rsel_val;
+
+       if (hw->soc->pin_rsel) {
+               /* find pin rsel_index from pin_rsel array*/
+               err = mtk_hw_pin_rsel_lookup(hw, desc, pullup,
arg,
&rsel_val);
+               if (err)
+                       goto out;
+       } else {
+               if (arg < MTK_PULL_SET_RSEL_000 ||
+                   arg > MTK_PULL_SET_RSEL_111) {
+                       err = -EINVAL;
+                       goto out;
+               }
+
+               rsel_val -= MTK_PULL_SET_RSEL_000;
+       }
This is not structured correctly. Think about this: on a chip,
say
MT8195,
which has hw->soc->pin_rsel defined, but the device tree writer
chose
to use the macros instead of SI unit values. This is exactly the
scenario
you discussed privately with me.

This also fails the case where bias-pull-{up,down} is specified
without
an argument, in which case arg == 1. This does seem to be covered
by
falling back to just PU/PD, but it's not exactly obvious,
especially
since we are skipping mtk_pinconf_bias_set_pu_pd() just below.

So you actually need to check for the magic values first, and if
arg
doesn't match any of them, assume an SI unit argument and try to
do
a lookup.
one very important point of upstream is keeping backward
compatibility,
since almost all customers of other MTK platforms does not care
about
resistor values so we leave user to choose MTK_PULL_SET_RSEL_XXX
without necessity to know resistor value.
I'm not sure about the connection to backward compatibility here,
given
that you are just introducing support for RSEL.

quoted
Our policy is making most customers/users convenient.
Encourage of using SI unit is not in concern.

For mt8195, we choose "hw->soc->pin_rsel", so it can support SI
unit.
Regarding my concern, there are a lot of moving pieces here, so let's
see
how the next revision turns out and if this is still an issue.

quoted
quoted
quoted
+
+       err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL,
rsel_val);
+       if (err)
+               goto out;
+
+       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
MTK_ENABLE);
+
+out:
+       return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
                                const struct mtk_pin_desc
*desc,
                                u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int
mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
This hunk is somewhat whacky. I assume it's because you also
fixed up
the indentation for mtk_pinconf_bias_set_combo(). While nice to
do,
in this case it actually works against having an easy to read
patch.
yes, it's because to fix up
the indentation for mtk_pinconf_bias_set_combo().
I suggest moving that to a separate patch. While whitespace changes
are
sometimes frowned upon, I think this is OK given that it would
improve
readability of the patches following it. You should mention that in
the
commit message to justify the change.

quoted
quoted
quoted
        return err;
 }

-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-                               const struct mtk_pin_desc
*desc,
-                               u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 *pullup, u32 *enable)
 {
-       int err;
+       int pu, pd, rsel, err;

-       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL,
&rsel);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU,
&pu);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup,
arg);
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD,
&pd);
Maybe this could reuse mtk_pinconf_bias_get_pu_pd(), much like on
the
`set`
side?
we will try to reuse mtk_pinconf_bias_get_pu_pd().

quoted
quoted
+
+       if (pu == 0 && pd == 0) {
+               *pullup = 0;
+               *enable = MTK_DISABLE;
+       } else if (pu == 1 && pd == 0) {
+               *pullup = 1;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else if (pu == 0 && pd == 1) {
+               *pullup = 0;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else {
+               err = -EINVAL;
+               goto out;
+       }

 out:
        return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+                              const struct mtk_pin_desc *desc,
+                              u32 pullup, u32 arg)
+{
+       int err = -EOPNOTSUPP;
+       bool try_all_type;
+
+       try_all_type = hw->soc->pull_type ? false : true;
Using ternary ops is discouraged. Maybe this could be structured
like:

    u32 pull_type;

    if (hw->soc->pull_type)
            pull_type = hw->soc->pull_type[desc->number];
    else
            pull_type = MTK_PULL_TYPE_MASK;

That way you don't need to test `try_all_type` every time.
we will try to change it in next version.

quoted
quoted
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_rsel(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_set_pu_pd(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_pullsel_pullen(hw,
desc,
+                                                         pullu
p,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE)) {
+               err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc,
pullup, arg);
+               if (err)
+                       dev_err(hw->dev, "Invalid pull
argument\n");
The "if (err)" could be moved outside the upper "if" block. That
way
the code flow looks more consistent, plus we get an error message
regardless of the pull type supported.
we will move "if (err)" outside the upper "if" block in the next
version.
quoted
quoted
+       }
+
+       return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);

 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
                              const struct mtk_pin_desc *desc,
                              u32 *pullup, u32 *enable)
 {
-       int err;
+       int err = -EOPNOTSUPP;
+       bool try_all_type;

-       err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup,
enable);
-       if (!err)
-               goto out;
+       try_all_type = hw->soc->pull_type ? false : true;
Same here.
we will try to change it in next version.

quoted
quoted
-       err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
pullup,
enable);
-       if (!err)
-               goto out;
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_rsel(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_get_pu_pd(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }

-       err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup,
enable);
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_pullsel_pullen(hw,
desc,
+                                                         pullu
p,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE))
+               err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc,
pullup, enable);

-out:
        return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE            BIT(0)
+#define MTK_PULL_PULLSEL_TYPE          BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE                BIT(2)
+#define MTK_PULL_RSEL_TYPE             BIT(3)
+#define MTK_PULL_PU_PD_RSEL_TYPE       (MTK_PULL_PU_PD_TYPE \
+                                       | MTK_PULL_RSEL_TYPE)
MTK_PULL_RSEL_TYPE deserves a comment saying why it should not be
used
on its own.

But since mtk_pinconf_bias_set_rsel() is already calling
mtk_pinconf_bias_set_pu_pd(), if the former function is reworked,
then
the two types don't need to be combined for the fallback
behavior.

MTK_PULL_PU_PD_RSEL_TYPE is type wihch is can be control by
MTK_PULL_PU_PD_TYPE or MTK_PULL_RSEL_TYPE. so we combibe them
together.
But can RSEL be used without PU/PD? The definitions read like
"PU_PD_RSEL"
means either RSEL or PU/PD can be used, but if I understand the
hardware
correctly, RSEL by itself only selects the resistor value, but
doesn't
turn on/off the bias nor select pull up or down. So RSEL is an
extension
of PU/PD, and by itself won't have any real effect.

Since this could be interpreted either way, a comment explaining
things
should be added to document the author's intentions.

quoted
quoted
quoted
 #define EINT_NA        U16_MAX
 #define NO_EINT_SUPPORT        EINT_NA
@@ -42,6 +49,14 @@
        PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs,
_s_bit,    \
                       _x_bits, 32, 1)

+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl,
_down_rsel) {  \
                                                    ^ rsel?

quoted
+               .s_pin =
_s_pin,                                        \
+               .e_pin =
_e_pin,                                        \
+               .rsel_index =
_rsel_index,                              \
+               .up_rsel =
_up_resl,                                    \
+               .down_rsel =
_down_rsel,                                \
+       }
+
 /* List these attributes which could be modified for the pin
*/
 enum {
        PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };

@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
        u8  fixed;
 };

+/* struct mtk_pin_rsel - the structure that providing bias
resistance selection.
                                               ^ provides
we will change it in next version.


quoted
quoted
+ * @s_pin:             the start pin within the rsel range
+ * @e_pin:             the end pin within the rsel range
+ * @rsel_index:        the rsel bias resistance index
+ * @up_rsel:   the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+       u16 s_pin;
+       u16 e_pin;
+       u16 rsel_index;
+       u32 up_rsel;
+       u32 down_rsel;
+};
+
If it were up to me, I would split this into two layers, one for
the
register value <-> resistor value mapping, lets call it "rsel
table",
and the other for pin <-> "rsel table" mapping.

I assume most if not all pins that support rsel would have the
same
set
of resistor values, so that would trade a level of indirection
for
better
usage of space.

quoted
 /* struct mtk_pin_reg_calc - the structure that holds all
ranges
used to
  *                          determine which register the pin
would
make use of
  *                          for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
        bool                            ies_present;
        const char * const              *base_names;
        unsigned int                    nbase_names;
+       const unsigned int              *pull_type;
+       const struct mtk_pin_rsel       *pin_rsel;
+       unsigned int                    npin_rsel;

        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc *desc,
u32
arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc *desc,
u32
*val);
-
Unrelated whitespace change. Please remove it.
we will remove it in next version.

quoted
quoted
        /* Specific driver data */
        void                            *driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct
mtk_pinctrl *hw, unsigned int gpio, int
        mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen)
+       unsigned int gpio, char *buf, unsigned int buf_len)
Unrelated change.
we will sparate it in next version.

quoted
quoted
 {
-       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1,
rsel
= -1;
        const struct mtk_pin_desc *desc;

        if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pinmux -= hw->soc->nfuncs;

        mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+
+       /* Case for: R1R0 */
        if (pullen == MTK_PUPD_SET_R1R0_00) {
                pullen = 0;
                r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pullen = 1;
                r1 = 1;
                r0 = 1;
-       } else if (pullen != MTK_DISABLE && pullen !=
MTK_ENABLE) {
-               pullen = 0;
        }
-       len += scnprintf(buf + len, bufLen - len,
+
+       /* Case for: RSEL */
+       if (pullen >= MTK_PULL_SET_RSEL_000 &&
+           pullen <= MTK_PULL_SET_RSEL_111) {
+               rsel = pullen - MTK_PULL_SET_RSEL_000;
+               pullen = 1;
+       }
+
+       len += scnprintf(buf + len, buf_len - len,
Unrelated change.
it is used to get rsel debug changes
quoted
quoted
                        "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
                        gpio,
                        pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                        pullup);

        if (r1 != -1) {
-               len += scnprintf(buf + len, bufLen - len, "
(%1d
%1d)\n",
+               len += scnprintf(buf + len, buf_len - len, "
(%1d
%1d)\n",
                        r1, r0);
+       } else if (rsel != -1) {
+               len += scnprintf(buf + len, buf_len - len, "
(%1d)\n", rsel);
        } else {
-               len += scnprintf(buf + len, bufLen - len,
"\n");
+               len += scnprintf(buf + len, buf_len - len,
"\n");
Unrelated changes.
it is used to get rsel debug changes
Sorry about the confusion. The unrelated change I meant to point out
is actually just the "bufLen" to "buf_len" change.


Regards
ChenYu

Hi ChenYu,

we find that we want to print rsel value, If we not change "bufLen" to
"buf_len". It will print warning. So we change them in the rsel patch.
It seems that it is not suitable to separate it as another one patch.

Thanks.

quoted
quoted
quoted
        }

        return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h
b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct
platform_device *pdev,
                            const struct mtk_pin_soc *soc);

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen);
+       unsigned int gpio, char *buf, unsigned int buf_len);
Unrelated change.
sparate it in next version.

quoted
Regards
ChenYu

quoted
 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;

--
2.18.0
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: Chen-Yu Tsai <wenst@chromium.org>

      Date: 2021-09-16 09:41:10 
    

  

  
On Thu, Sep 16, 2021 at 5:31 PM zhiyong.tao [off-list ref] wrote:
On Mon, 2021-09-06 at 18:09 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Sep 6, 2021 at 11:17 AM zhiyong.tao <zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 18:10 +0800, Chen-Yu Tsai wrote:
quoted
Hi,

On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao <
zhiyong.tao@mediatek.com
quoted
wrote:

This patch provides rsel setting on MT8195
A bit more context, like what is rsel, would be nice.
we will add more context it in the next version.
quoted
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133
+++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181
++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)
Could you split this patch into two, so the common parts are in
the
first
patch, and the mt8195 specific changes are in the second?
ok, we will split in the next version.
Hi Chen-Yu,

the common parts and the mt8195 specific changes are a new rsel
feature. Is it suitable to separate them?
Because you are changing an existing, used code path, it would make it
much clearer what the change is. This helps if the change accidentally
introduced some bug, and someone later bisected the issue down to this
specific patch. It would make more sense to that person if they saw
"introduce support for RSEL" instead of "introduce RSEL for MT8195".

The latter could be understood as support for the RSEL feature already
existed, and thus might seem confusing; whereas if you separate out
the core changes it would be clear that you are adding support for a
new feature, and the platform changes come later.

Thanks.

quoted
quoted
quoted
quoted
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct mtk_pin_field_calc
mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };

+static const struct mtk_pin_field_calc mt8195_pin_rsel_range[]
= {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel mt8195_pin_rsel_val_range[] =
{
+       PIN_RSEL(8, 17, 0x0, 75000, 75000),
+       PIN_RSEL(8, 17, 0x1, 10000, 5000),
+       PIN_RSEL(8, 17, 0x2, 5000, 75000),
+       PIN_RSEL(8, 17, 0x3, 4000, 5000),
+       PIN_RSEL(8, 17, 0x4, 3000, 75000),
+       PIN_RSEL(8, 17, 0x5, 2000, 5000),
+       PIN_RSEL(8, 17, 0x6, 1500, 75000),
+       PIN_RSEL(8, 17, 0x7, 1000, 5000),
+       PIN_RSEL(29, 30, 0x0, 75000, 75000),
+       PIN_RSEL(29, 30, 0x1, 10000, 5000),
+       PIN_RSEL(29, 30, 0x2, 5000, 75000),
+       PIN_RSEL(29, 30, 0x3, 4000, 5000),
+       PIN_RSEL(29, 30, 0x4, 3000, 75000),
+       PIN_RSEL(29, 30, 0x5, 2000, 5000),
+       PIN_RSEL(29, 30, 0x6, 1500, 75000),
+       PIN_RSEL(29, 30, 0x7, 1000, 5000),
+       PIN_RSEL(34, 35, 0x0, 75000, 75000),
+       PIN_RSEL(34, 35, 0x1, 10000, 5000),
+       PIN_RSEL(34, 35, 0x2, 5000, 75000),
+       PIN_RSEL(34, 35, 0x3, 4000, 5000),
+       PIN_RSEL(34, 35, 0x4, 3000, 75000),
+       PIN_RSEL(34, 35, 0x5, 2000, 5000),
+       PIN_RSEL(34, 35, 0x6, 1500, 75000),
+       PIN_RSEL(34, 35, 0x7, 1000, 5000),
+       PIN_RSEL(44, 45, 0x0, 75000, 75000),
+       PIN_RSEL(44, 45, 0x1, 10000, 5000),
+       PIN_RSEL(44, 45, 0x2, 5000, 75000),
+       PIN_RSEL(44, 45, 0x3, 4000, 5000),
+       PIN_RSEL(44, 45, 0x4, 3000, 75000),
+       PIN_RSEL(44, 45, 0x5, 2000, 5000),
+       PIN_RSEL(44, 45, 0x6, 1500, 75000),
+       PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+       MTK_PULL_PUPD_R1R0_TYPE /* 0 */,
MTK_PULL_PUPD_R1R0_TYPE /*
1 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 2 */,
MTK_PULL_PUPD_R1R0_TYPE /*
3 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 4 */,
MTK_PULL_PUPD_R1R0_TYPE /*
5 */,
+       MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /* 7
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 8 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 9 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 10 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 11 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 12 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 13 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 14 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 15 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 16 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 17 */,
+       MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE /* 19
*/,
+       MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE /* 21
*/,
+       MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE /* 23
*/,
+       MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE /* 25
*/,
+       MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE /* 27
*/,
+       MTK_PULL_PU_PD_TYPE /* 28 */, MTK_PULL_PU_PD_RSEL_TYPE
/*
29 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 30 */, MTK_PULL_PU_PD_TYPE
/*
31 */,
+       MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE /* 33
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 34 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 35 */,
+       MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE /* 37
*/,
+       MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE /* 39
*/,
+       MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE /* 41
*/,
+       MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE /* 43
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 44 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 45 */,
+       MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE /* 47
*/,
+       MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE /* 49
*/,
+       MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE /* 51
*/,
+       MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE /* 53
*/,
+       MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE /* 55
*/,
+       MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE /* 57
*/,
+       MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE /* 59
*/,
+       MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE /* 61
*/,
+       MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE /* 63
*/,
+       MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE /* 65
*/,
+       MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE /* 67
*/,
+       MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE /* 69
*/,
+       MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE /* 71
*/,
+       MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE /* 73
*/,
+       MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE /* 75
*/,
+       MTK_PULL_PU_PD_TYPE /* 76 */, MTK_PULL_PUPD_R1R0_TYPE
/* 77
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 78 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 79 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 80 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 81 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 82 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 83 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 84 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 85 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 86 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 87 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 88 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 89 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 90 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 91 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 92 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 93 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 94 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 95 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 96 */, MTK_PULL_PU_PD_TYPE
/* 97
*/,
+       MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE /* 99
*/,
+       MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE /*
101
*/,
+       MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE /*
103
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 104 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 105 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 106 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 107 */,
+       MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE /*
109
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 110 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 111 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 112 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 113 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 114 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 115 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 116 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 117 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 118 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 119 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 120 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 121 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 122 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 123 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 124 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 125 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 126 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 127 */,
+       MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE /*
129
*/,
+       MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE /*
131
*/,
+       MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE /*
133
*/,
+       MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE /*
135
*/,
+       MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE /*
137
*/,
+       MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE /*
139
*/,
+       MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE /*
141
*/,
+       MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE /*
143
*/,
+};
+
 static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] =
MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] =
MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] = MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] = MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] =
MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] =
MTK_RANGE(mt8195_pin_rsel_range),
 };

 static const char * const mt8195_pinctrl_register_base_names[]
= {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc mt8195_data
= {
        .gpio_m = 0,
        .base_names = mt8195_pinctrl_register_base_names,
        .nbase_names =
ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+       .pull_type = mt8195_pull_type,
+       .pin_rsel = mt8195_pin_rsel_val_range,
+       .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
        .bias_set_combo = mtk_pinconf_bias_set_combo,
        .bias_get_combo = mtk_pinconf_bias_get_combo,
        .drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        } else if (arg == MTK_PUPD_SET_R1R0_11) {
                r0 = 1;
                r1 = 1;
+       } else if (arg == MTK_ENABLE) {
+               r0 = 1;
+               r1 = 0;
This change does not seem related. This should be in a separate
patch
and why and what this change is should be described in the commit
log.
I assume this is to support "bias-pull-up" or "bias-pull-down"
without
arguments on pins using R1R0?
we will separate it in next version.
some users want only pull up/down, they don't care about the
resistance
value. So we support the case which only use "bias-pull-up" or
"bias-
pull-down" without arguments on pins using R1R0.
I see. This should be added as a separate patch before the RSEL stuff
then. That way it would also be easier to backport in case it is
needed.

quoted
quoted
quoted
        } else {
                err = -EINVAL;
                goto out;
@@ -661,6 +664,75 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        return err;
 }

+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+                                 const struct mtk_pin_desc
*desc,
+                                 u32 pullup, u32 arg, u32
*rsel_val)
+{
+       const struct mtk_pin_rsel *rsel;
+       int check;
+       bool found = false;
+
+       rsel = hw->soc->pin_rsel;
+
+       for (check = 0; check <= hw->soc->npin_rsel - 1;
check++) {
+               if (desc->number >= rsel[check].s_pin &&
+                   desc->number <= rsel[check].e_pin) {
+                       if (pullup) {
+                               if (rsel[check].up_rsel == arg)
{
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       } else {
+                               if (rsel[check].down_rsel ==
arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       }
+               }
+       }
+
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d Ohm
for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be
network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP is
not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.
The context surrounding this warning seems to be that ENOTSUPP is
hard
for userspace to understand. AFAIK the return code here does not get
passed to userspace? And the pinctrl core does check for EINVAL or
ENOTSUPP, so I think this is a valid use case.

Linus?
Hi Linus,

Do you have some suggestion for the warning issue?

Thanks

quoted
quoted
quoted
I also think it would make sense to differentiate between the pin
not
supporting RSEL (return -ENOTSUPP) vs supporting RSEL but a
resistor
value not in the table was requested (return -EINVAL). This might
be
easier to do with the two-table design I mentioned.
It only support resistor value on the patch on mt8195. we think we
need
only maintain one-table design.
OK. I think there's a possibility that some corner case might happen.
I guess we'll deal with them if they occur.

quoted
quoted
quoted
+       }
+
+       return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 pullup, u32 arg)
+{
+       int err, rsel_val;
+
+       if (hw->soc->pin_rsel) {
+               /* find pin rsel_index from pin_rsel array*/
+               err = mtk_hw_pin_rsel_lookup(hw, desc, pullup,
arg,
&rsel_val);
+               if (err)
+                       goto out;
+       } else {
+               if (arg < MTK_PULL_SET_RSEL_000 ||
+                   arg > MTK_PULL_SET_RSEL_111) {
+                       err = -EINVAL;
+                       goto out;
+               }
+
+               rsel_val -= MTK_PULL_SET_RSEL_000;
+       }
This is not structured correctly. Think about this: on a chip,
say
MT8195,
which has hw->soc->pin_rsel defined, but the device tree writer
chose
to use the macros instead of SI unit values. This is exactly the
scenario
you discussed privately with me.

This also fails the case where bias-pull-{up,down} is specified
without
an argument, in which case arg == 1. This does seem to be covered
by
falling back to just PU/PD, but it's not exactly obvious,
especially
since we are skipping mtk_pinconf_bias_set_pu_pd() just below.

So you actually need to check for the magic values first, and if
arg
doesn't match any of them, assume an SI unit argument and try to
do
a lookup.
one very important point of upstream is keeping backward
compatibility,
since almost all customers of other MTK platforms does not care
about
resistor values so we leave user to choose MTK_PULL_SET_RSEL_XXX
without necessity to know resistor value.
I'm not sure about the connection to backward compatibility here,
given
that you are just introducing support for RSEL.

quoted
Our policy is making most customers/users convenient.
Encourage of using SI unit is not in concern.

For mt8195, we choose "hw->soc->pin_rsel", so it can support SI
unit.
Regarding my concern, there are a lot of moving pieces here, so let's
see
how the next revision turns out and if this is still an issue.

quoted
quoted
quoted
+
+       err = mtk_hw_set_value(hw, desc, PINCTRL_PIN_REG_RSEL,
rsel_val);
+       if (err)
+               goto out;
+
+       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
MTK_ENABLE);
+
+out:
+       return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl *hw,
                                const struct mtk_pin_desc
*desc,
                                u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int
mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
This hunk is somewhat whacky. I assume it's because you also
fixed up
the indentation for mtk_pinconf_bias_set_combo(). While nice to
do,
in this case it actually works against having an easy to read
patch.
yes, it's because to fix up
the indentation for mtk_pinconf_bias_set_combo().
I suggest moving that to a separate patch. While whitespace changes
are
sometimes frowned upon, I think this is OK given that it would
improve
readability of the patches following it. You should mention that in
the
commit message to justify the change.

quoted
quoted
quoted
        return err;
 }

-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-                               const struct mtk_pin_desc
*desc,
-                               u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl *hw,
+                                    const struct mtk_pin_desc
*desc,
+                                    u32 *pullup, u32 *enable)
 {
-       int err;
+       int pu, pd, rsel, err;

-       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_RSEL,
&rsel);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PU,
&pu);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc, pullup,
arg);
+       err = mtk_hw_get_value(hw, desc, PINCTRL_PIN_REG_PD,
&pd);
Maybe this could reuse mtk_pinconf_bias_get_pu_pd(), much like on
the
`set`
side?
we will try to reuse mtk_pinconf_bias_get_pu_pd().

quoted
quoted
+
+       if (pu == 0 && pd == 0) {
+               *pullup = 0;
+               *enable = MTK_DISABLE;
+       } else if (pu == 1 && pd == 0) {
+               *pullup = 1;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else if (pu == 0 && pd == 1) {
+               *pullup = 0;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else {
+               err = -EINVAL;
+               goto out;
+       }

 out:
        return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+                              const struct mtk_pin_desc *desc,
+                              u32 pullup, u32 arg)
+{
+       int err = -EOPNOTSUPP;
+       bool try_all_type;
+
+       try_all_type = hw->soc->pull_type ? false : true;
Using ternary ops is discouraged. Maybe this could be structured
like:

    u32 pull_type;

    if (hw->soc->pull_type)
            pull_type = hw->soc->pull_type[desc->number];
    else
            pull_type = MTK_PULL_TYPE_MASK;

That way you don't need to test `try_all_type` every time.
we will try to change it in next version.

quoted
quoted
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_rsel(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_set_pu_pd(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_pullsel_pullen(hw,
desc,
+                                                         pullu
p,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE)) {
+               err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc,
pullup, arg);
+               if (err)
+                       dev_err(hw->dev, "Invalid pull
argument\n");
The "if (err)" could be moved outside the upper "if" block. That
way
the code flow looks more consistent, plus we get an error message
regardless of the pull type supported.
we will move "if (err)" outside the upper "if" block in the next
version.
quoted
quoted
+       }
+
+       return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);

 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
                              const struct mtk_pin_desc *desc,
                              u32 *pullup, u32 *enable)
 {
-       int err;
+       int err = -EOPNOTSUPP;
+       bool try_all_type;

-       err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup,
enable);
-       if (!err)
-               goto out;
+       try_all_type = hw->soc->pull_type ? false : true;
Same here.
we will try to change it in next version.

quoted
quoted
-       err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
pullup,
enable);
-       if (!err)
-               goto out;
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_rsel(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_get_pu_pd(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }

-       err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc, pullup,
enable);
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_pullsel_pullen(hw,
desc,
+                                                         pullu
p,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE))
+               err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc,
pullup, enable);

-out:
        return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE            BIT(0)
+#define MTK_PULL_PULLSEL_TYPE          BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE                BIT(2)
+#define MTK_PULL_RSEL_TYPE             BIT(3)
+#define MTK_PULL_PU_PD_RSEL_TYPE       (MTK_PULL_PU_PD_TYPE \
+                                       | MTK_PULL_RSEL_TYPE)
MTK_PULL_RSEL_TYPE deserves a comment saying why it should not be
used
on its own.

But since mtk_pinconf_bias_set_rsel() is already calling
mtk_pinconf_bias_set_pu_pd(), if the former function is reworked,
then
the two types don't need to be combined for the fallback
behavior.

MTK_PULL_PU_PD_RSEL_TYPE is type wihch is can be control by
MTK_PULL_PU_PD_TYPE or MTK_PULL_RSEL_TYPE. so we combibe them
together.
But can RSEL be used without PU/PD? The definitions read like
"PU_PD_RSEL"
means either RSEL or PU/PD can be used, but if I understand the
hardware
correctly, RSEL by itself only selects the resistor value, but
doesn't
turn on/off the bias nor select pull up or down. So RSEL is an
extension
of PU/PD, and by itself won't have any real effect.

Since this could be interpreted either way, a comment explaining
things
should be added to document the author's intentions.

quoted
quoted
quoted
 #define EINT_NA        U16_MAX
 #define NO_EINT_SUPPORT        EINT_NA
@@ -42,6 +49,14 @@
        PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr, _x_addrs,
_s_bit,    \
                       _x_bits, 32, 1)

+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl,
_down_rsel) {  \
                                                    ^ rsel?

quoted
+               .s_pin =
_s_pin,                                        \
+               .e_pin =
_e_pin,                                        \
+               .rsel_index =
_rsel_index,                              \
+               .up_rsel =
_up_resl,                                    \
+               .down_rsel =
_down_rsel,                                \
+       }
+
 /* List these attributes which could be modified for the pin
*/
 enum {
        PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };

@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
        u8  fixed;
 };

+/* struct mtk_pin_rsel - the structure that providing bias
resistance selection.
                                               ^ provides
we will change it in next version.


quoted
quoted
+ * @s_pin:             the start pin within the rsel range
+ * @e_pin:             the end pin within the rsel range
+ * @rsel_index:        the rsel bias resistance index
+ * @up_rsel:   the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+       u16 s_pin;
+       u16 e_pin;
+       u16 rsel_index;
+       u32 up_rsel;
+       u32 down_rsel;
+};
+
If it were up to me, I would split this into two layers, one for
the
register value <-> resistor value mapping, lets call it "rsel
table",
and the other for pin <-> "rsel table" mapping.

I assume most if not all pins that support rsel would have the
same
set
of resistor values, so that would trade a level of indirection
for
better
usage of space.

quoted
 /* struct mtk_pin_reg_calc - the structure that holds all
ranges
used to
  *                          determine which register the pin
would
make use of
  *                          for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
        bool                            ies_present;
        const char * const              *base_names;
        unsigned int                    nbase_names;
+       const unsigned int              *pull_type;
+       const struct mtk_pin_rsel       *pin_rsel;
+       unsigned int                    npin_rsel;

        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc *desc,
u32
arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc *desc,
u32
*val);
-
Unrelated whitespace change. Please remove it.
we will remove it in next version.

quoted
quoted
        /* Specific driver data */
        void                            *driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct
mtk_pinctrl *hw, unsigned int gpio, int
        mtk_hw_get_value_wrap(hw, gpio, PINCTRL_PIN_REG_DRV)

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen)
+       unsigned int gpio, char *buf, unsigned int buf_len)
Unrelated change.
we will sparate it in next version.

quoted
quoted
 {
-       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1;
+       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 = -1,
rsel
= -1;
        const struct mtk_pin_desc *desc;

        if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pinmux -= hw->soc->nfuncs;

        mtk_pinconf_bias_get_combo(hw, desc, &pullup, &pullen);
+
+       /* Case for: R1R0 */
        if (pullen == MTK_PUPD_SET_R1R0_00) {
                pullen = 0;
                r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pullen = 1;
                r1 = 1;
                r0 = 1;
-       } else if (pullen != MTK_DISABLE && pullen !=
MTK_ENABLE) {
-               pullen = 0;
        }
-       len += scnprintf(buf + len, bufLen - len,
+
+       /* Case for: RSEL */
+       if (pullen >= MTK_PULL_SET_RSEL_000 &&
+           pullen <= MTK_PULL_SET_RSEL_111) {
+               rsel = pullen - MTK_PULL_SET_RSEL_000;
+               pullen = 1;
+       }
+
+       len += scnprintf(buf + len, buf_len - len,
Unrelated change.
it is used to get rsel debug changes
quoted
quoted
                        "%03d: %1d%1d%1d%1d%02d%1d%1d%1d%1d",
                        gpio,
                        pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                        pullup);

        if (r1 != -1) {
-               len += scnprintf(buf + len, bufLen - len, "
(%1d
%1d)\n",
+               len += scnprintf(buf + len, buf_len - len, "
(%1d
%1d)\n",
                        r1, r0);
+       } else if (rsel != -1) {
+               len += scnprintf(buf + len, buf_len - len, "
(%1d)\n", rsel);
        } else {
-               len += scnprintf(buf + len, bufLen - len,
"\n");
+               len += scnprintf(buf + len, buf_len - len,
"\n");
Unrelated changes.
it is used to get rsel debug changes
Sorry about the confusion. The unrelated change I meant to point out
is actually just the "bufLen" to "buf_len" change.


Regards
ChenYu

Hi ChenYu,

we find that we want to print rsel value, If we not change "bufLen" to
"buf_len". It will print warning. So we change them in the rsel patch.
It seems that it is not suitable to separate it as another one patch.
I understand it to be a style check warning triggered by your changes
covering the same section to add rsel to the debug output (and getting
seen by checkpatch).

You can structure your patches so that you first fix the code style
in a preceding patch, with its commit message expressly stating that
you are doing the cleanup to avoid checkpatch warnings in a following
patch.

That way you clean up existing code, avoid the warning, and don't do
two things in one patch.


Regards
ChenYu

Thanks.

quoted
quoted
quoted
quoted
        }

        return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h
b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct
platform_device *pdev,
                            const struct mtk_pin_soc *soc);

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen);
+       unsigned int gpio, char *buf, unsigned int buf_len);
Unrelated change.
sparate it in next version.

quoted
Regards
ChenYu

quoted
 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;

--
2.18.0
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-17 02:13:15 
    

  

  
On Thu, 2021-09-16 at 17:40 +0800, Chen-Yu Tsai wrote:
On Thu, Sep 16, 2021 at 5:31 PM zhiyong.tao <zhiyong.tao@mediatek.com
quoted
wrote:

On Mon, 2021-09-06 at 18:09 +0800, Chen-Yu Tsai wrote:
quoted
On Mon, Sep 6, 2021 at 11:17 AM zhiyong.tao <
zhiyong.tao@mediatek.com
quoted
wrote:

On Wed, 2021-09-01 at 18:10 +0800, Chen-Yu Tsai wrote:
quoted
Hi,

On Mon, Aug 30, 2021 at 8:37 AM Zhiyong Tao <
zhiyong.tao@mediatek.com
quoted
wrote:

This patch provides rsel setting on MT8195
A bit more context, like what is rsel, would be nice.
we will add more context it in the next version.
quoted
quoted
Signed-off-by: Zhiyong Tao <redacted>
---
 drivers/pinctrl/mediatek/pinctrl-mt8195.c     | 133
+++++++++++++
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.c  | 181
++++++++++++++++--
 .../pinctrl/mediatek/pinctrl-mtk-common-v2.h  |  35 +++-
 drivers/pinctrl/mediatek/pinctrl-paris.c      |  24 ++-
 drivers/pinctrl/mediatek/pinctrl-paris.h      |   2 +-
 5 files changed, 348 insertions(+), 27 deletions(-)
Could you split this patch into two, so the common parts are
in
the
first
patch, and the mt8195 specific changes are in the second?
ok, we will split in the next version.
Hi Chen-Yu,

the common parts and the mt8195 specific changes are a new rsel
feature. Is it suitable to separate them?
Because you are changing an existing, used code path, it would make
it
much clearer what the change is. This helps if the change
accidentally
introduced some bug, and someone later bisected the issue down to
this
specific patch. It would make more sense to that person if they saw
"introduce support for RSEL" instead of "introduce RSEL for MT8195".

The latter could be understood as support for the RSEL feature
already
existed, and thus might seem confusing; whereas if you separate out
the core changes it would be clear that you are adding support for a
new feature, and the platform changes come later.
Thanks for your explanation. we will separate them.

quoted
Thanks.

quoted
quoted
quoted
quoted
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
index 892e79703f98..275b7ba4386d 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mt8195.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mt8195.c
@@ -779,6 +779,135 @@ static const struct
mtk_pin_field_calc
mt8195_pin_drv_adv_range[] = {
        PIN_FIELD_BASE(45, 45, 1, 0x040, 0x10, 9, 3),
 };

+static const struct mtk_pin_field_calc
mt8195_pin_rsel_range[]
= {
+       PIN_FIELD_BASE(8, 8, 4, 0x0c0, 0x10, 15, 3),
+       PIN_FIELD_BASE(9, 9, 4, 0x0c0, 0x10, 0, 3),
+       PIN_FIELD_BASE(10, 10, 4, 0x0c0, 0x10, 18, 3),
+       PIN_FIELD_BASE(11, 11, 4, 0x0c0, 0x10, 3, 3),
+       PIN_FIELD_BASE(12, 12, 4, 0x0c0, 0x10, 21, 3),
+       PIN_FIELD_BASE(13, 13, 4, 0x0c0, 0x10, 6, 3),
+       PIN_FIELD_BASE(14, 14, 4, 0x0c0, 0x10, 24, 3),
+       PIN_FIELD_BASE(15, 15, 4, 0x0c0, 0x10, 9, 3),
+       PIN_FIELD_BASE(16, 16, 4, 0x0c0, 0x10, 27, 3),
+       PIN_FIELD_BASE(17, 17, 4, 0x0c0, 0x10, 12, 3),
+       PIN_FIELD_BASE(29, 29, 2, 0x080, 0x10, 0, 3),
+       PIN_FIELD_BASE(30, 30, 2, 0x080, 0x10, 3, 3),
+       PIN_FIELD_BASE(34, 34, 1, 0x0e0, 0x10, 0, 3),
+       PIN_FIELD_BASE(35, 35, 1, 0x0e0, 0x10, 3, 3),
+       PIN_FIELD_BASE(44, 44, 1, 0x0e0, 0x10, 6, 3),
+       PIN_FIELD_BASE(45, 45, 1, 0x0e0, 0x10, 9, 3),
+};
+
+static const struct mtk_pin_rsel
mt8195_pin_rsel_val_range[] =
{
+       PIN_RSEL(8, 17, 0x0, 75000, 75000),
+       PIN_RSEL(8, 17, 0x1, 10000, 5000),
+       PIN_RSEL(8, 17, 0x2, 5000, 75000),
+       PIN_RSEL(8, 17, 0x3, 4000, 5000),
+       PIN_RSEL(8, 17, 0x4, 3000, 75000),
+       PIN_RSEL(8, 17, 0x5, 2000, 5000),
+       PIN_RSEL(8, 17, 0x6, 1500, 75000),
+       PIN_RSEL(8, 17, 0x7, 1000, 5000),
+       PIN_RSEL(29, 30, 0x0, 75000, 75000),
+       PIN_RSEL(29, 30, 0x1, 10000, 5000),
+       PIN_RSEL(29, 30, 0x2, 5000, 75000),
+       PIN_RSEL(29, 30, 0x3, 4000, 5000),
+       PIN_RSEL(29, 30, 0x4, 3000, 75000),
+       PIN_RSEL(29, 30, 0x5, 2000, 5000),
+       PIN_RSEL(29, 30, 0x6, 1500, 75000),
+       PIN_RSEL(29, 30, 0x7, 1000, 5000),
+       PIN_RSEL(34, 35, 0x0, 75000, 75000),
+       PIN_RSEL(34, 35, 0x1, 10000, 5000),
+       PIN_RSEL(34, 35, 0x2, 5000, 75000),
+       PIN_RSEL(34, 35, 0x3, 4000, 5000),
+       PIN_RSEL(34, 35, 0x4, 3000, 75000),
+       PIN_RSEL(34, 35, 0x5, 2000, 5000),
+       PIN_RSEL(34, 35, 0x6, 1500, 75000),
+       PIN_RSEL(34, 35, 0x7, 1000, 5000),
+       PIN_RSEL(44, 45, 0x0, 75000, 75000),
+       PIN_RSEL(44, 45, 0x1, 10000, 5000),
+       PIN_RSEL(44, 45, 0x2, 5000, 75000),
+       PIN_RSEL(44, 45, 0x3, 4000, 5000),
+       PIN_RSEL(44, 45, 0x4, 3000, 75000),
+       PIN_RSEL(44, 45, 0x5, 2000, 5000),
+       PIN_RSEL(44, 45, 0x6, 1500, 75000),
+       PIN_RSEL(44, 45, 0x7, 1000, 5000),
+};
+
+static const unsigned int mt8195_pull_type[] = {
+       MTK_PULL_PUPD_R1R0_TYPE /* 0 */,
MTK_PULL_PUPD_R1R0_TYPE /*
1 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 2 */,
MTK_PULL_PUPD_R1R0_TYPE /*
3 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 4 */,
MTK_PULL_PUPD_R1R0_TYPE /*
5 */,
+       MTK_PULL_PU_PD_TYPE /* 6 */, MTK_PULL_PU_PD_TYPE /*
7
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 8 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 9 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 10 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 11 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 12 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 13 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 14 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 15 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 16 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 17 */,
+       MTK_PULL_PU_PD_TYPE /* 18 */, MTK_PULL_PU_PD_TYPE
/* 19
*/,
+       MTK_PULL_PU_PD_TYPE /* 20 */, MTK_PULL_PU_PD_TYPE
/* 21
*/,
+       MTK_PULL_PU_PD_TYPE /* 22 */, MTK_PULL_PU_PD_TYPE
/* 23
*/,
+       MTK_PULL_PU_PD_TYPE /* 24 */, MTK_PULL_PU_PD_TYPE
/* 25
*/,
+       MTK_PULL_PU_PD_TYPE /* 26 */, MTK_PULL_PU_PD_TYPE
/* 27
*/,
+       MTK_PULL_PU_PD_TYPE /* 28 */,
MTK_PULL_PU_PD_RSEL_TYPE
/*
29 */,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 30 */,
MTK_PULL_PU_PD_TYPE
/*
31 */,
+       MTK_PULL_PU_PD_TYPE /* 32 */, MTK_PULL_PU_PD_TYPE
/* 33
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 34 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 35 */,
+       MTK_PULL_PU_PD_TYPE /* 36 */, MTK_PULL_PU_PD_TYPE
/* 37
*/,
+       MTK_PULL_PU_PD_TYPE /* 38 */, MTK_PULL_PU_PD_TYPE
/* 39
*/,
+       MTK_PULL_PU_PD_TYPE /* 40 */, MTK_PULL_PU_PD_TYPE
/* 41
*/,
+       MTK_PULL_PU_PD_TYPE /* 42 */, MTK_PULL_PU_PD_TYPE
/* 43
*/,
+       MTK_PULL_PU_PD_RSEL_TYPE /* 44 */,
MTK_PULL_PU_PD_RSEL_TYPE
/* 45 */,
+       MTK_PULL_PU_PD_TYPE /* 46 */, MTK_PULL_PU_PD_TYPE
/* 47
*/,
+       MTK_PULL_PU_PD_TYPE /* 48 */, MTK_PULL_PU_PD_TYPE
/* 49
*/,
+       MTK_PULL_PU_PD_TYPE /* 50 */, MTK_PULL_PU_PD_TYPE
/* 51
*/,
+       MTK_PULL_PU_PD_TYPE /* 52 */, MTK_PULL_PU_PD_TYPE
/* 53
*/,
+       MTK_PULL_PU_PD_TYPE /* 54 */, MTK_PULL_PU_PD_TYPE
/* 55
*/,
+       MTK_PULL_PU_PD_TYPE /* 56 */, MTK_PULL_PU_PD_TYPE
/* 57
*/,
+       MTK_PULL_PU_PD_TYPE /* 58 */, MTK_PULL_PU_PD_TYPE
/* 59
*/,
+       MTK_PULL_PU_PD_TYPE /* 60 */, MTK_PULL_PU_PD_TYPE
/* 61
*/,
+       MTK_PULL_PU_PD_TYPE /* 62 */, MTK_PULL_PU_PD_TYPE
/* 63
*/,
+       MTK_PULL_PU_PD_TYPE /* 64 */, MTK_PULL_PU_PD_TYPE
/* 65
*/,
+       MTK_PULL_PU_PD_TYPE /* 66 */, MTK_PULL_PU_PD_TYPE
/* 67
*/,
+       MTK_PULL_PU_PD_TYPE /* 68 */, MTK_PULL_PU_PD_TYPE
/* 69
*/,
+       MTK_PULL_PU_PD_TYPE /* 70 */, MTK_PULL_PU_PD_TYPE
/* 71
*/,
+       MTK_PULL_PU_PD_TYPE /* 72 */, MTK_PULL_PU_PD_TYPE
/* 73
*/,
+       MTK_PULL_PU_PD_TYPE /* 74 */, MTK_PULL_PU_PD_TYPE
/* 75
*/,
+       MTK_PULL_PU_PD_TYPE /* 76 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 77
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 78 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 79 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 80 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 81 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 82 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 83 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 84 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 85 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 86 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 87 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 88 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 89 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 90 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 91 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 92 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 93 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 94 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 95 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 96 */,
MTK_PULL_PU_PD_TYPE
/* 97
*/,
+       MTK_PULL_PU_PD_TYPE /* 98 */, MTK_PULL_PU_PD_TYPE
/* 99
*/,
+       MTK_PULL_PU_PD_TYPE /* 100 */, MTK_PULL_PU_PD_TYPE
/*
101
*/,
+       MTK_PULL_PU_PD_TYPE /* 102 */, MTK_PULL_PU_PD_TYPE
/*
103
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 104 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 105 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 106 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 107 */,
+       MTK_PULL_PU_PD_TYPE /* 108 */, MTK_PULL_PU_PD_TYPE
/*
109
*/,
+       MTK_PULL_PUPD_R1R0_TYPE /* 110 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 111 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 112 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 113 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 114 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 115 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 116 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 117 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 118 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 119 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 120 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 121 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 122 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 123 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 124 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 125 */,
+       MTK_PULL_PUPD_R1R0_TYPE /* 126 */,
MTK_PULL_PUPD_R1R0_TYPE
/* 127 */,
+       MTK_PULL_PU_PD_TYPE /* 128 */, MTK_PULL_PU_PD_TYPE
/*
129
*/,
+       MTK_PULL_PU_PD_TYPE /* 130 */, MTK_PULL_PU_PD_TYPE
/*
131
*/,
+       MTK_PULL_PU_PD_TYPE /* 132 */, MTK_PULL_PU_PD_TYPE
/*
133
*/,
+       MTK_PULL_PU_PD_TYPE /* 134 */, MTK_PULL_PU_PD_TYPE
/*
135
*/,
+       MTK_PULL_PU_PD_TYPE /* 136 */, MTK_PULL_PU_PD_TYPE
/*
137
*/,
+       MTK_PULL_PU_PD_TYPE /* 138 */, MTK_PULL_PU_PD_TYPE
/*
139
*/,
+       MTK_PULL_PU_PD_TYPE /* 140 */, MTK_PULL_PU_PD_TYPE
/*
141
*/,
+       MTK_PULL_PU_PD_TYPE /* 142 */, MTK_PULL_PU_PD_TYPE
/*
143
*/,
+};
+
 static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_MODE] =
MTK_RANGE(mt8195_pin_mode_range),
        [PINCTRL_PIN_REG_DIR] =
MTK_RANGE(mt8195_pin_dir_range),
@@ -793,6 +922,7 @@ static const struct mtk_pin_reg_calc
mt8195_reg_cals[PINCTRL_PIN_REG_MAX] = {
        [PINCTRL_PIN_REG_R0] =
MTK_RANGE(mt8195_pin_r0_range),
        [PINCTRL_PIN_REG_R1] =
MTK_RANGE(mt8195_pin_r1_range),
        [PINCTRL_PIN_REG_DRV_ADV] =
MTK_RANGE(mt8195_pin_drv_adv_range),
+       [PINCTRL_PIN_REG_RSEL] =
MTK_RANGE(mt8195_pin_rsel_range),
 };

 static const char * const
mt8195_pinctrl_register_base_names[]
= {
@@ -817,6 +947,9 @@ static const struct mtk_pin_soc
mt8195_data
= {
        .gpio_m = 0,
        .base_names = mt8195_pinctrl_register_base_names,
        .nbase_names =
ARRAY_SIZE(mt8195_pinctrl_register_base_names),
+       .pull_type = mt8195_pull_type,
+       .pin_rsel = mt8195_pin_rsel_val_range,
+       .npin_rsel = ARRAY_SIZE(mt8195_pin_rsel_val_range),
        .bias_set_combo = mtk_pinconf_bias_set_combo,
        .bias_get_combo = mtk_pinconf_bias_get_combo,
        .drive_set = mtk_pinconf_drive_set_rev1,
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-
v2.c
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
index 5b3b048725cc..b6a89d41f040 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.c
@@ -641,6 +641,9 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        } else if (arg == MTK_PUPD_SET_R1R0_11) {
                r0 = 1;
                r1 = 1;
+       } else if (arg == MTK_ENABLE) {
+               r0 = 1;
+               r1 = 0;
This change does not seem related. This should be in a
separate
patch
and why and what this change is should be described in the
commit
log.
I assume this is to support "bias-pull-up" or "bias-pull-
down"
without
arguments on pins using R1R0?
we will separate it in next version.
some users want only pull up/down, they don't care about the
resistance
value. So we support the case which only use "bias-pull-up" or
"bias-
pull-down" without arguments on pins using R1R0.
I see. This should be added as a separate patch before the RSEL
stuff
then. That way it would also be easier to backport in case it is
needed.

quoted
quoted
quoted
        } else {
                err = -EINVAL;
                goto out;
@@ -661,6 +664,75 @@ static int
mtk_pinconf_bias_set_pupd_r1_r0(struct mtk_pinctrl *hw,
        return err;
 }

+static int mtk_hw_pin_rsel_lookup(struct mtk_pinctrl *hw,
+                                 const struct mtk_pin_desc
*desc,
+                                 u32 pullup, u32 arg, u32
*rsel_val)
+{
+       const struct mtk_pin_rsel *rsel;
+       int check;
+       bool found = false;
+
+       rsel = hw->soc->pin_rsel;
+
+       for (check = 0; check <= hw->soc->npin_rsel - 1;
check++) {
+               if (desc->number >= rsel[check].s_pin &&
+                   desc->number <= rsel[check].e_pin) {
+                       if (pullup) {
+                               if (rsel[check].up_rsel ==
arg)
{
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       } else {
+                               if (rsel[check].down_rsel
==
arg) {
+                                       found = true;
+                                       *rsel_val =
rsel[check].rsel_index;
+                                       break;
+                               }
+                       }
+               }
+       }
+
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d
Ohm
for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be
network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP
is
not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.
The context surrounding this warning seems to be that ENOTSUPP is
hard
for userspace to understand. AFAIK the return code here does not
get
passed to userspace? And the pinctrl core does check for EINVAL
or
ENOTSUPP, so I think this is a valid use case.

Linus?
Hi Linus,

Do you have some suggestion for the warning issue?

Thanks
If Linus has no suggestion,
we will keep "EOPNOTSUPP" to avoid checking warning in next version.

quoted
quoted
quoted
quoted
I also think it would make sense to differentiate between the
pin
not
supporting RSEL (return -ENOTSUPP) vs supporting RSEL but a
resistor
value not in the table was requested (return -EINVAL). This
might
be
easier to do with the two-table design I mentioned.
It only support resistor value on the patch on mt8195. we think
we
need
only maintain one-table design.
OK. I think there's a possibility that some corner case might
happen.
I guess we'll deal with them if they occur.

quoted
quoted
quoted
+       }
+
+       return 0;
+}
+
+static int mtk_pinconf_bias_set_rsel(struct mtk_pinctrl
*hw,
+                                    const struct
mtk_pin_desc
*desc,
+                                    u32 pullup, u32 arg)
+{
+       int err, rsel_val;
+
+       if (hw->soc->pin_rsel) {
+               /* find pin rsel_index from pin_rsel
array*/
+               err = mtk_hw_pin_rsel_lookup(hw, desc,
pullup,
arg,
&rsel_val);
+               if (err)
+                       goto out;
+       } else {
+               if (arg < MTK_PULL_SET_RSEL_000 ||
+                   arg > MTK_PULL_SET_RSEL_111) {
+                       err = -EINVAL;
+                       goto out;
+               }
+
+               rsel_val -= MTK_PULL_SET_RSEL_000;
+       }
This is not structured correctly. Think about this: on a
chip,
say
MT8195,
which has hw->soc->pin_rsel defined, but the device tree
writer
chose
to use the macros instead of SI unit values. This is exactly
the
scenario
you discussed privately with me.

This also fails the case where bias-pull-{up,down} is
specified
without
an argument, in which case arg == 1. This does seem to be
covered
by
falling back to just PU/PD, but it's not exactly obvious,
especially
since we are skipping mtk_pinconf_bias_set_pu_pd() just
below.

So you actually need to check for the magic values first, and
if
arg
doesn't match any of them, assume an SI unit argument and try
to
do
a lookup.
one very important point of upstream is keeping backward
compatibility,
since almost all customers of other MTK platforms does not care
about
resistor values so we leave user to choose
MTK_PULL_SET_RSEL_XXX
without necessity to know resistor value.
I'm not sure about the connection to backward compatibility here,
given
that you are just introducing support for RSEL.

quoted
Our policy is making most customers/users convenient.
Encourage of using SI unit is not in concern.

For mt8195, we choose "hw->soc->pin_rsel", so it can support SI
unit.
Regarding my concern, there are a lot of moving pieces here, so
let's
see
how the next revision turns out and if this is still an issue.

quoted
quoted
quoted
+
+       err = mtk_hw_set_value(hw, desc,
PINCTRL_PIN_REG_RSEL,
rsel_val);
+       if (err)
+               goto out;
+
+       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
MTK_ENABLE);
+
+out:
+       return err;
+}
+
 static int mtk_pinconf_bias_get_pu_pd(struct mtk_pinctrl
*hw,
                                const struct mtk_pin_desc
*desc,
                                u32 *pullup, u32 *enable)
@@ -742,44 +814,117 @@ static int
mtk_pinconf_bias_get_pupd_r1_r0(struct mtk_pinctrl *hw,
This hunk is somewhat whacky. I assume it's because you also
fixed up
the indentation for mtk_pinconf_bias_set_combo(). While nice
to
do,
in this case it actually works against having an easy to read
patch.
yes, it's because to fix up
the indentation for mtk_pinconf_bias_set_combo().
I suggest moving that to a separate patch. While whitespace
changes
are
sometimes frowned upon, I think this is OK given that it would
improve
readability of the patches following it. You should mention that
in
the
commit message to justify the change.

quoted
quoted
quoted
        return err;
 }

-int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
-                               const struct mtk_pin_desc
*desc,
-                               u32 pullup, u32 arg)
+static int mtk_pinconf_bias_get_rsel(struct mtk_pinctrl
*hw,
+                                    const struct
mtk_pin_desc
*desc,
+                                    u32 *pullup, u32
*enable)
 {
-       int err;
+       int pu, pd, rsel, err;

-       err = mtk_pinconf_bias_set_pu_pd(hw, desc, pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc,
PINCTRL_PIN_REG_RSEL,
&rsel);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pullsel_pullen(hw, desc,
pullup,
arg);
-       if (!err)
+       err = mtk_hw_get_value(hw, desc,
PINCTRL_PIN_REG_PU,
&pu);
+       if (err)
                goto out;

-       err = mtk_pinconf_bias_set_pupd_r1_r0(hw, desc,
pullup,
arg);
+       err = mtk_hw_get_value(hw, desc,
PINCTRL_PIN_REG_PD,
&pd);
Maybe this could reuse mtk_pinconf_bias_get_pu_pd(), much
like on
the
`set`
side?
we will try to reuse mtk_pinconf_bias_get_pu_pd().

quoted
quoted
+
+       if (pu == 0 && pd == 0) {
+               *pullup = 0;
+               *enable = MTK_DISABLE;
+       } else if (pu == 1 && pd == 0) {
+               *pullup = 1;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else if (pu == 0 && pd == 1) {
+               *pullup = 0;
+               *enable = rsel + MTK_PULL_SET_RSEL_000;
+       } else {
+               err = -EINVAL;
+               goto out;
+       }

 out:
        return err;
 }
+
+int mtk_pinconf_bias_set_combo(struct mtk_pinctrl *hw,
+                              const struct mtk_pin_desc
*desc,
+                              u32 pullup, u32 arg)
+{
+       int err = -EOPNOTSUPP;
+       bool try_all_type;
+
+       try_all_type = hw->soc->pull_type ? false : true;
Using ternary ops is discouraged. Maybe this could be
structured
like:

    u32 pull_type;

    if (hw->soc->pull_type)
            pull_type = hw->soc->pull_type[desc->number];
    else
            pull_type = MTK_PULL_TYPE_MASK;

That way you don't need to test `try_all_type` every time.
we will try to change it in next version.

quoted
quoted
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_set_rsel(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_set_pu_pd(hw, desc,
pullup,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err =
mtk_pinconf_bias_set_pullsel_pullen(hw,
desc,
+                                                         p
ullu
p,
arg);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE)) {
+               err = mtk_pinconf_bias_set_pupd_r1_r0(hw,
desc,
pullup, arg);
+               if (err)
+                       dev_err(hw->dev, "Invalid pull
argument\n");
The "if (err)" could be moved outside the upper "if" block.
That
way
the code flow looks more consistent, plus we get an error
message
regardless of the pull type supported.
we will move "if (err)" outside the upper "if" block in the
next
version.
quoted
quoted
+       }
+
+       return err;
+}
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_set_combo);

 int mtk_pinconf_bias_get_combo(struct mtk_pinctrl *hw,
                              const struct mtk_pin_desc
*desc,
                              u32 *pullup, u32 *enable)
 {
-       int err;
+       int err = -EOPNOTSUPP;
+       bool try_all_type;

-       err = mtk_pinconf_bias_get_pu_pd(hw, desc, pullup,
enable);
-       if (!err)
-               goto out;
+       try_all_type = hw->soc->pull_type ? false : true;
Same here.
we will try to change it in next version.

quoted
quoted
-       err = mtk_pinconf_bias_get_pullsel_pullen(hw, desc,
pullup,
enable);
-       if (!err)
-               goto out;
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_RSEL_TYPE)) {
+               err = mtk_pinconf_bias_get_rsel(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PU_PD_TYPE)) {
+               err = mtk_pinconf_bias_get_pu_pd(hw, desc,
pullup,
enable);
+               if (!err)
+                       return err;
+       }

-       err = mtk_pinconf_bias_get_pupd_r1_r0(hw, desc,
pullup,
enable);
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PULLSEL_TYPE)) {
+               err =
mtk_pinconf_bias_get_pullsel_pullen(hw,
desc,
+                                                         p
ullu
p,
enable);
+               if (!err)
+                       return err;
+       }
+
+       if (try_all_type ||
+           (hw->soc->pull_type[desc->number] &
MTK_PULL_PUPD_R1R0_TYPE))
+               err = mtk_pinconf_bias_get_pupd_r1_r0(hw,
desc,
pullup, enable);

-out:
        return err;
 }
 EXPORT_SYMBOL_GPL(mtk_pinconf_bias_get_combo);
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common-
v2.h
b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
index a6f1bdb2083b..a3d73f153efe 100644
--- a/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
+++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common-v2.h
@@ -17,6 +17,13 @@
 #define MTK_ENABLE     1
 #define MTK_PULLDOWN   0
 #define MTK_PULLUP     1
+#define MTK_PULL_PU_PD_TYPE            BIT(0)
+#define MTK_PULL_PULLSEL_TYPE          BIT(1)
+#define MTK_PULL_PUPD_R1R0_TYPE                BIT(2)
+#define MTK_PULL_RSEL_TYPE             BIT(3)
+#define
MTK_PULL_PU_PD_RSEL_TYPE       (MTK_PULL_PU_PD_TYPE \
+                                       |
MTK_PULL_RSEL_TYPE)
MTK_PULL_RSEL_TYPE deserves a comment saying why it should
not be
used
on its own.

But since mtk_pinconf_bias_set_rsel() is already calling
mtk_pinconf_bias_set_pu_pd(), if the former function is
reworked,
then
the two types don't need to be combined for the fallback
behavior.

MTK_PULL_PU_PD_RSEL_TYPE is type wihch is can be control by
MTK_PULL_PU_PD_TYPE or MTK_PULL_RSEL_TYPE. so we combibe them
together.
But can RSEL be used without PU/PD? The definitions read like
"PU_PD_RSEL"
means either RSEL or PU/PD can be used, but if I understand the
hardware
correctly, RSEL by itself only selects the resistor value, but
doesn't
turn on/off the bias nor select pull up or down. So RSEL is an
extension
of PU/PD, and by itself won't have any real effect.

Since this could be interpreted either way, a comment explaining
things
should be added to document the author's intentions.

quoted
quoted
quoted
 #define EINT_NA        U16_MAX
 #define NO_EINT_SUPPORT        EINT_NA
@@ -42,6 +49,14 @@
        PIN_FIELD_CALC(_s_pin, _e_pin, 0, _s_addr,
_x_addrs,
_s_bit,    \
                       _x_bits, 32, 1)

+#define PIN_RSEL(_s_pin, _e_pin, _rsel_index, _up_resl,
_down_rsel) {  \
                                                    ^ rsel?

quoted
+               .s_pin =
_s_pin,                                        \
+               .e_pin =
_e_pin,                                        \
+               .rsel_index =
_rsel_index,                              \
+               .up_rsel =
_up_resl,                                    \
+               .down_rsel =
_down_rsel,                                \
+       }
+
 /* List these attributes which could be modified for the
pin
*/
 enum {
        PINCTRL_PIN_REG_MODE,
@@ -67,6 +82,7 @@ enum {
        PINCTRL_PIN_REG_DRV_E0,
        PINCTRL_PIN_REG_DRV_E1,
        PINCTRL_PIN_REG_DRV_ADV,
+       PINCTRL_PIN_REG_RSEL,
        PINCTRL_PIN_REG_MAX,
 };

@@ -129,6 +145,21 @@ struct mtk_pin_field_calc {
        u8  fixed;
 };

+/* struct mtk_pin_rsel - the structure that providing bias
resistance selection.
                                               ^ provides
we will change it in next version.


quoted
quoted
+ * @s_pin:             the start pin within the rsel range
+ * @e_pin:             the end pin within the rsel range
+ * @rsel_index:        the rsel bias resistance index
+ * @up_rsel:   the pullup rsel bias resistance value
+ * @down_rsel: the pulldown rsel bias resistance value
+ */
+struct mtk_pin_rsel {
+       u16 s_pin;
+       u16 e_pin;
+       u16 rsel_index;
+       u32 up_rsel;
+       u32 down_rsel;
+};
+
If it were up to me, I would split this into two layers, one
for
the
register value <-> resistor value mapping, lets call it "rsel
table",
and the other for pin <-> "rsel table" mapping.

I assume most if not all pins that support rsel would have
the
same
set
of resistor values, so that would trade a level of
indirection
for
better
usage of space.

quoted
 /* struct mtk_pin_reg_calc - the structure that holds all
ranges
used to
  *                          determine which register the
pin
would
make use of
  *                          for certain pin attribute.
@@ -206,6 +237,9 @@ struct mtk_pin_soc {
        bool                            ies_present;
        const char * const              *base_names;
        unsigned int                    nbase_names;
+       const unsigned int              *pull_type;
+       const struct mtk_pin_rsel       *pin_rsel;
+       unsigned int                    npin_rsel;

        /* Specific pinconfig operations */
        int (*bias_disable_set)(struct mtk_pinctrl *hw,
@@ -237,7 +271,6 @@ struct mtk_pin_soc {
                             const struct mtk_pin_desc
*desc,
u32
arg);
        int (*adv_drive_get)(struct mtk_pinctrl *hw,
                             const struct mtk_pin_desc
*desc,
u32
*val);
-
Unrelated whitespace change. Please remove it.
we will remove it in next version.

quoted
quoted
        /* Specific driver data */
        void                            *driver_data;
 };
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.c
b/drivers/pinctrl/mediatek/pinctrl-paris.c
index 85db2e4377f0..8990cfe47d72 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.c
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.c
@@ -577,9 +577,9 @@ static int mtk_hw_get_value_wrap(struct
mtk_pinctrl *hw, unsigned int gpio, int
        mtk_hw_get_value_wrap(hw, gpio,
PINCTRL_PIN_REG_DRV)

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen)
+       unsigned int gpio, char *buf, unsigned int buf_len)
Unrelated change.
we will sparate it in next version.

quoted
quoted
 {
-       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 =
-1;
+       int pinmux, pullup, pullen, len = 0, r1 = -1, r0 =
-1,
rsel
= -1;
        const struct mtk_pin_desc *desc;

        if (gpio >= hw->soc->npins)
@@ -591,6 +591,8 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pinmux -= hw->soc->nfuncs;

        mtk_pinconf_bias_get_combo(hw, desc, &pullup,
&pullen);
+
+       /* Case for: R1R0 */
        if (pullen == MTK_PUPD_SET_R1R0_00) {
                pullen = 0;
                r1 = 0;
@@ -607,10 +609,16 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                pullen = 1;
                r1 = 1;
                r0 = 1;
-       } else if (pullen != MTK_DISABLE && pullen !=
MTK_ENABLE) {
-               pullen = 0;
        }
-       len += scnprintf(buf + len, bufLen - len,
+
+       /* Case for: RSEL */
+       if (pullen >= MTK_PULL_SET_RSEL_000 &&
+           pullen <= MTK_PULL_SET_RSEL_111) {
+               rsel = pullen - MTK_PULL_SET_RSEL_000;
+               pullen = 1;
+       }
+
+       len += scnprintf(buf + len, buf_len - len,
Unrelated change.
it is used to get rsel debug changes
quoted
quoted
                        "%03d:
%1d%1d%1d%1d%02d%1d%1d%1d%1d",
                        gpio,
                        pinmux,
@@ -624,10 +632,12 @@ ssize_t mtk_pctrl_show_one_pin(struct
mtk_pinctrl *hw,
                        pullup);

        if (r1 != -1) {
-               len += scnprintf(buf + len, bufLen - len, "
(%1d
%1d)\n",
+               len += scnprintf(buf + len, buf_len - len,
"
(%1d
%1d)\n",
                        r1, r0);
+       } else if (rsel != -1) {
+               len += scnprintf(buf + len, buf_len - len,
"
(%1d)\n", rsel);
        } else {
-               len += scnprintf(buf + len, bufLen - len,
"\n");
+               len += scnprintf(buf + len, buf_len - len,
"\n");
Unrelated changes.
it is used to get rsel debug changes
Sorry about the confusion. The unrelated change I meant to point
out
is actually just the "bufLen" to "buf_len" change.


Regards
ChenYu

Hi ChenYu,

we find that we want to print rsel value, If we not change "bufLen"
to
"buf_len". It will print warning. So we change them in the rsel
patch.
It seems that it is not suitable to separate it as another one
patch.
I understand it to be a style check warning triggered by your changes
covering the same section to add rsel to the debug output (and
getting
seen by checkpatch).

You can structure your patches so that you first fix the code style
in a preceding patch, with its commit message expressly stating that
you are doing the cleanup to avoid checkpatch warnings in a following
patch.

That way you clean up existing code, avoid the warning, and don't do
two things in one patch.
Thanks for your suggestion, we will change it as your said.

Regards
ChenYu

quoted
Thanks.

quoted
quoted
quoted
quoted
        }

        return len;
diff --git a/drivers/pinctrl/mediatek/pinctrl-paris.h
b/drivers/pinctrl/mediatek/pinctrl-paris.h
index afb7650fd25b..681267c0e1a4 100644
--- a/drivers/pinctrl/mediatek/pinctrl-paris.h
+++ b/drivers/pinctrl/mediatek/pinctrl-paris.h
@@ -61,7 +61,7 @@ int mtk_paris_pinctrl_probe(struct
platform_device *pdev,
                            const struct mtk_pin_soc *soc);

 ssize_t mtk_pctrl_show_one_pin(struct mtk_pinctrl *hw,
-       unsigned int gpio, char *buf, unsigned int bufLen);
+       unsigned int gpio, char *buf, unsigned int
buf_len);
Unrelated change.
sparate it in next version.

quoted
Regards
ChenYu

quoted
 extern const struct dev_pm_ops mtk_paris_pinctrl_pm_ops;

--
2.18.0
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatekwe
quoted
quoted
quoted
quoted
quoted
will
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: Linus Walleij <hidden>

      Date: 2021-09-19 19:33:46 
    

  

  
On Thu, Sep 16, 2021 at 11:31 AM zhiyong.tao [off-list ref] wrote:
On Mon, 2021-09-06 at 18:09 +0800, Chen-Yu Tsai wrote:
quoted
quoted
quoted
quoted
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d Ohm
for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be
network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP is
not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.
The context surrounding this warning seems to be that ENOTSUPP is
hard
for userspace to understand. AFAIK the return code here does not get
passed to userspace? And the pinctrl core does check for EINVAL or
ENOTSUPP, so I think this is a valid use case.

Linus?
Hi Linus,

Do you have some suggestion for the warning issue?
Ignore the warning. We use this code in the pinctrl subsystem.

The pinctrl subsystem has no userspace API so that is certainly
not a problem.

Yours,
Linus Walleij

_______________________________________________
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Re: [PATCH v11 4/4] pinctrl: mediatek: add rsel setting on MT8195

    

      From: zhiyong.tao <hidden>

      Date: 2021-09-22 01:54:56 
    

  

  
On Sun, 2021-09-19 at 21:33 +0200, Linus Walleij wrote:
On Thu, Sep 16, 2021 at 11:31 AM zhiyong.tao <
zhiyong.tao@mediatek.com> wrote:
quoted
On Mon, 2021-09-06 at 18:09 +0800, Chen-Yu Tsai wrote:
quoted
quoted
quoted
quoted
+       if (!found) {
+               dev_err(hw->dev, "Not support rsel value %d
Ohm
for
pin = %d (%s)\n",
+                       arg, desc->number, desc->name);
+               return -EOPNOTSUPP;
I believe ENOTSUPP is the correct one. EOPNOTSUPP seems to be
network
related.
if we change it as "ENOTSUPP", it will report warning"ENOTSUPP
is
not
SUSV4 error code, prefer EOPNOTSUP" when checking patch.
The context surrounding this warning seems to be that ENOTSUPP is
hard
for userspace to understand. AFAIK the return code here does not
get
passed to userspace? And the pinctrl core does check for EINVAL
or
ENOTSUPP, so I think this is a valid use case.

Linus?
Hi Linus,

Do you have some suggestion for the warning issue?
Ignore the warning. We use this code in the pinctrl subsystem.

The pinctrl subsystem has no userspace API so that is certainly
not a problem.
Yours,
Linus Walleij
Thanks for your suggestion,

we will change it in the next version.

Thanks
_______________________________________________
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