[PATCH v2 3/5] clk: aspeed: Add eSPI reset bit
STALE1868d
From: Chia-Wei Wang <hidden>
Date: 2021-08-19 08:01:15
Also in:
linux-aspeed, linux-devicetree, lkml, openbmc
Subsystem:
common clk framework, open firmware and flattened device tree bindings, the rest · Maintainers:
Stephen Boyd, Brian Masney, Jerome Brunet, Rob Herring, Krzysztof Kozlowski, Conor Dooley, Linus Torvalds
Revision v2 of 6 in this series.
Revisions (6)
Add bit field definition for the eSPI reset control Signed-off-by: Chia-Wei Wang <redacted> --- include/dt-bindings/clock/ast2600-clock.h | 1 + 1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/ast2600-clock.h b/include/dt-bindings/clock/ast2600-clock.h
index 62b9520a00fd..964934b1caef 100644
--- a/include/dt-bindings/clock/ast2600-clock.h
+++ b/include/dt-bindings/clock/ast2600-clock.h@@ -89,6 +89,7 @@ #define ASPEED_CLK_MAC4RCLK 70 /* Only list resets here that are not part of a gate */ +#define ASPEED_RESET_ESPI 57 #define ASPEED_RESET_ADC 55 #define ASPEED_RESET_JTAG_MASTER2 54 #define ASPEED_RESET_I3C_DMA 39
--
2.17.1
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